Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer

1. A method of making a semiconductor device, comprising steps in an order of:

providing a carrier made of electrically conducting material;

forming contact pads on the carrier;

forming a pre-applied protective layer over an active surface of a semiconductor wafer;

removing a semiconductor die with the pre-applied protective layer from the semiconductor wafer;

mounting the semiconductor die with the pre-applied protective layer on the carrier;

encapsulating the semiconductor die and contact pads on the carrier;

completely removing the carrier;

forming a first insulating layer over the pre-applied protective layer and the contact pads;

forming vias in the first insulating layer and the pre-applied protective layer to expose interconnect sites on the semiconductor die; and

forming an interconnect structure over the first insulating layer in electrical contact with the interconnect sites on the semiconductor die and the contact pads.

2. The method of claim 1 , further including:

forming a redistribution layer on the first insulating layer;

forming a second insulating layer on the redistribution layer; and

forming an under bump metallization layer over the second insulating layer in electrical contact with the redistribution layer.

3. The method of claim 1 , further comprising:

forming a first via in the pre-applied protective layer; and

forming a second via in the first insulating layer aligned with the first via in the pre-applied protective layer to expose the interconnect sites.

4. The method of claim 1 , further including mounting a passive component on the contact pads.

5. The method of claim 1 , further including forming a solder bump on the under bump metallization.

6. A method of making a semiconductor device, comprising steps in an order:

providing a carrier;

forming contact pads on the carrier;

mounting a semiconductor die on the carrier, the semiconductor die having a pre-applied protective layer over an active surface of the semiconductor die;

encapsulating the semiconductor die and the contact pads on the carrier;

completely removing the carrier;

forming a first insulating layer over the pre-applied protective layer and the contact pads;

forming vias in the first insulating layer and the pre-applied protective layer to expose interconnect sites on the semiconductor die; and

forming an interconnect structure over the insulating layer in electrical contact with the interconnect sites on the semiconductor die and the contact pads.

7. The method of claim 6 , further including:

forming the protective layer over an active surface of a semiconductor wafer; and

removing the semiconductor die with the pre-applied protective layer from the semiconductor wafer.

8. The method of claim 6 , further including:

forming a redistribution layer on the first insulating layer;

forming a second insulating layer on the redistribution layer; and

forming an under bump metallization layer over the second insulating layer in electrical contact with the redistribution layer.

9. The method of claim 6 , further comprising:

forming a first via in the pre-applied protective layer; and

forming a second via in the first insulating layer aligned with the first via in the pre-applied protective layer to expose the interconnect sites.

10. The method of claim 6 , further including mounting a passive component on the contact pads.

11. The method of claim 6 , further including forming a solder bump on the under bump metallization.

12. A method of making a semiconductor device, comprising steps in an order:

providing a carrier;

forming contact pads on the carrier;

mounting a semiconductor die on the carrier, the semiconductor die having pre-applied protective layer on an active surface of the semiconductor die;

encapsulating the semiconductor die and the contact pads on the carrier with a molding compound;

completely removing the carrier;

forming vias in the pre-applied protective layer to expose interconnect sites on the semiconductor die; and

forming an interconnect structure over the protective layer in electrical contact with the interconnect sites on the semiconductor die and the contact pads.

13. The method of claim 12 , further including forming a first insulating layer over the protective layer and contact pads.

14. The method of claim 12 , further including:

forming the protective layer over an active surface of a semiconductor wafer; and

removing the semiconductor die with the protective layer from the semiconductor wafer.

15. The method of claim 12 , further including:

forming a redistribution layer on the first insulating layer;

forming a second insulating layer on the redistribution layer; and

forming an under bump metallization layer over the second insulating in electrical contact with the redistribution layer.

16. The method of claim 12 , further comprising:

forming a first via in the protective layer; and

forming a second via in the first insulating layer aligned with the first via in the protective layer to expose the interconnect sites.

17. The method of claim 12 , further including mounting a passive component on the contact pads.

18. The method of claim 12 , further including forming a solder bump on the under bump metallization.

19. The method of claim 12 , further including:

forming vias through the molding compound to expose the contact pads; and

forming a redistribution layer over the molding compound in electrical contact with the contact pads.