Methods for manufacturing a CMOS device with dual dielectric layers
The present disclosure provides a dual workfunction semiconductor device and a method for manufacturing a dual workfunction semiconductor device. The method comprises providing a device on a first region and a device on a second region of a substrate. According to embodiments described herein, the method includes providing a dielectric layer onto the first and second region of the substrate, the dielectric layer on the first region being integrally deposited with the dielectric layer on the second region, and providing a gate electrode on top of the dielectric layer on both the first and second regions, the gate electrode on the first region being integrally deposited with the gate electrode on the second region. The method further includes changing the workfunction of the device on the first region by providing a capping layer onto the first region between the dielectric layer and the gate electrode, and changing the workfunction of the device on the second region by including species at the interface between the dielectric layer and the electrode.
1 . A method for manufacturing a dual workfunction semiconductor device, comprising:
providing a device on a first region and a device on a second region of a substrate, wherein providing a device on a first region and a device on the second region of a substrate comprises providing a dielectric layer onto the first and second region of the substrate, the dielectric layer on the first region being integrally deposited with the dielectric layer on the second region, and providing a gate electrode on top of the dielectric layer on both the first and second regions, the gate electrode on the first region being integrally deposited with the gate electrode on the second region and both the gate electrode on the first region and the gate electrode on the second region having a workfunction;
changing the workfunction of the gate electrode on the first region by providing a capping layer onto the first region between the dielectric layer and the gate electrode; and
changing the workfunction of the gate electrode on the second region by implanting species to introduce the species at the interface between the dielectric layer and the gate electrode in the second region.
2 . A method according to claim 1 , wherein the device on the first region is an N-MOS device.
3 . A method according to claim 1 , wherein the device on the second region is a P-MOS device.
4 . A method according to claim 1 , wherein implanting species at the interface between the dielectric layer and the gate electrode is performed before providing the gate electrode on top of the dielectric layer.
5 . A method according to claim 1 , wherein implanting species at the interface between the dielectric layer and the gate electrode is performed after gate electrode formation.
6 . A method according to claim 1 , wherein implanting species at the interface between the dielectric layer and the gate electrode comprises providing a resist layer on specific locations of the dielectric layer, and performing ion implantation in regions not covered by the resist layer.
7 . A method according to claim 1 , wherein providing a capping layer comprises providing a DyOx capping layer.
8 . A method according to claim 7 , further comprising removing the capping layer by a selective wet etch.
9 . A method according to claim 8 , wherein the selective wet etch comprises using a low-pH solution, wherein the low-pH solution has a pH lower than 5.
10 . A method according to claim 1 , wherein the gate electrode is a FUSI gate electrode.
11 . A dual workfunction semiconductor device, comprising:
a device of a first type and a device of a second type, wherein each device comprises a gate dielectric on a substrate and a gate electrode on the gate dielectric, wherein the gate electrode has a workfunction, wherein the gate electrodes of the device of the first type are integrally made with the gate electrodes of the device of the second type, and wherein the gate dielectric of the device of the first type is integrally made with the gate dielectric of the device of the second type;
a capping layer in between the dielectric layer and the gate electrode of the device of the first type; and
implanted species at the interface between the dielectric layer and the gate electrode of the device of the second type.
12 . A dual workfunction semiconductor device, comprising:
devices of a first type and devices of a second type, wherein each device comprises a gate dielectric on a substrate and a gate electrode on the gate dielectric, wherein the gate electrode has a workfunction, wherein the gate electrodes of the devices of the first type are integrally made with the gate electrodes of the devices of the second type, and wherein the gate dielectric of the devices of the first type is integrally made with the gate dielectric of the devices of the second type;
a capping layer in between the dielectric layer and the gate electrode of the devices of the first type; and
implanted species at the interface between the dielectric layer and the gate electrode of the devices of the second type.