IP Library Granted Patent US 7,682,872
Granted Patent B2
US 7,682,872 · App. 12/037,084 · Granted Mar 23, 2010

Integrated circuit package system with underfill

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Quick Facts
Patent No.
US 7,682,872
App. No.
12/037,084
Granted
Mar 23, 2010
Kind
B2
Abstract

An integrated circuit package system includes: providing a package carrier; forming a first channel in the package carrier; mounting a first integrated circuit device over the package carrier and adjacent to the first channel; mounting a second integrated circuit device over the package carrier and adjacent to the first channel; and forming a contiguous underfill fillet with the first channel and under both the first integrated circuit device and the second integrated circuit device.

Claims (37)

1. A method of manufacturing an integrated circuit package system comprising:

providing a package carrier;

forming a first channel in the package carrier;

forming a second channel in contact with the first channel;

mounting a first integrated circuit device over the package carrier and adjacent to the first channel;

mounting a second integrated circuit device over the package carrier and adjacent to the first channel and the second channel; and

forming a contiguous underfill fillet with the first channel and under both the first integrated circuit device and the second integrated circuit device.

2. The method as claimed in claim 1 wherein mounting the first integrated circuit device over the package carrier and adjacent to the first channel includes mounting a first side of the first integrated circuit device adjacent to the first channel without covering the first channel.

3. The method as claimed in claim 1 wherein mounting the first integrated circuit device over the package carrier and adjacent to the first channel includes mounting the first integrated circuit device over the package carrier and adjacent to the first channel which does not extend beyond a first side of the first integrated circuit device.

4. The method as claimed in claim 1 wherein forming the first channel in the package carrier includes forming the first channel with a solder resist of the package carrier.

5. A method for manufacturing an integrated circuit package system comprising:

providing a package carrier;

forming a first channel in contact with a second channel in the package carrier with the second channel substantially perpendicular to the first channel;

mounting a first integrated circuit device over the package carrier and adjacent to the first channel;

mounting a second integrated circuit device over the package carrier and adjacent to the first channel and the second channel; and

forming a contiguous underfill fillet over the first channel and the second channel and under both the first integrated circuit device and the second integrated circuit device.

6. The method as claimed in claim 5 wherein mounting the first integrated circuit device over the package carrier and adjacent to the first channel includes mounting a first side of the first integrated circuit device adjacent to the first channel without covering the first channel and the second channel.

7. The method as claimed in claim 5 wherein mounting the first integrated circuit device over the package carrier and adjacent to the first channel includes mounting the first integrated circuit device over the package carrier and adjacent to the first channel which does not extend beyond a first side of the first integrated circuit device.

8. The method as claimed in claim 5 wherein forming the first channel in contact with the second channel includes forming the first channel and the second channel with patterned solder resist.

9. The method as claimed in claim 5 further comprising mounting a third integrated circuit device over the package carrier and adjacent to at least one of the first channel and the second channel.

10. An integrated circuit package system comprising:

a package carrier having a first channel and a second channel in contact with the first channel;

a first integrated circuit device mounted over the package carrier and adjacent to the first channel;

a second integrated circuit device mounted over the package carrier and adjacent to the first channel and the second channel; and

a contiguous underfill fillet over the first channel and under both the first integrated circuit device and the second integrated circuit device.

11. The system as claimed in claim 10 wherein the first integrated circuit device is over the package carrier and adjacent to the first channel without covering the first channel.

12. The system as claimed in claim 10 wherein the first integrated circuit device is over the package carrier and adjacent to the first channel which does not extend beyond a first side of the first integrated circuit device.

13. The system as claimed in claim 10 wherein the first channel includes a solder resist.

14. The system as claimed in claim 10 wherein:

the package carrier includes the second channel in contact with the first channel and the second integrated circuit device is adjacent to the second channel; and

the contiguous underfill fillet is over the second channel.

15. The system as claimed in claim 14 wherein the second channel includes a solder resist.

16. The system as claimed in claim 14 further comprising a third integrated circuit device over the package carrier and adjacent to at least one of the first channel and the second channel.

17. The system as claimed in claim 14 further comprising external connective elements attached to a bottom side of the package carrier.

18. The system as claimed in claim 14 further comprising:

a third integrated circuit device over the package carrier and adjacent to at least one of the first channel and the second channel; and

wherein the contiguous underfill fillet is under the third integrated circuit device.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CONVEYING PARTY DATS FROM STSTS CHIPPAC PTE. LTE. TO STSTS CHIPPAC LTD. AND CORRECT THE NAME OF RECEOVING PARTY DATA FROM STSTS CHIPPAC PTE. LTE. TO STSTS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED AT REEL: 64838 FRAME: 948. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded May 30, 2024
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 067568/0139 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0328 Recorded Aug 30, 2023
From: STATS CHIPPAC PTE. LTE.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064838/0948 →
RELEASE OF SECURITY INTEREST Recorded Jun 15, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052935/0327 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0328 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2008
From: PARK, SOOMOON; LEE, TAE KEUN; LEE, YORIM
To: STATS CHIPPAC LTD.
Reel/Frame 020557/0515 →