IP Library Granted Patent US 8,138,590
Granted Patent B2
US 8,138,590 · App. 12/143,047 · Granted Mar 20, 2012

Integrated circuit package system with wire-in-film encapsulation

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Quick Facts
Patent No.
US 8,138,590
App. No.
12/143,047
Granted
Mar 20, 2012
Kind
B2
Abstract

An integrated circuit package system includes: connecting a carrier and an integrated circuit mounted thereover; preforming a wire-in-film encapsulation having a cavity; pressing the wire-in-film encapsulation over the carrier and the integrated circuit with the cavity exposing a portion of the integrated circuit; and curing the wire-in-film encapsulation.

Claims (38)

1. A method for manufacturing an integrated circuit package system comprising:

connecting a carrier and an integrated circuit, mounted thereover, by a bond wire;

preforming a penetrable wire-in-film encapsulation having a cavity with orthogonal sidewalls;

pressing the penetrable wire-in-film encapsulation over the carrier, the bond wire, and the integrated circuit with the sidewalls of the cavity having a characteristic of an intersecting bulge caused by compression and the cavity exposing a portion of the integrated circuit; and

curing the penetrable wire-in-film encapsulation.

2. The method as claimed in claim 1 wherein preforming the penetrable wire-in-film encapsulation having the cavity includes attaching the penetrable wire-in-film encapsulation to a stiffener.

3. The method as claimed in claim 1 wherein preforming the penetrable wire-in-film encapsulation having the cavity includes preforming a penetrable film adhesive having a B-stage characteristic.

4. previously presented) The method as claimed in claim 1 further comprising mounting a device over the integrated circuit and in the cavity of the penetrable wire-in-film encapsulation.

5. The method as claimed in claim 1 further comprising attaching a lid over the cavity and the integrated circuit.

6. A method for manufacturing an integrated circuit package system comprising:

connecting a carrier and an integrated circuit, mounted thereover, by a bond wire;

preforming a penetrable wire-in-film encapsulation having a cavity with orthogonal sidewalls;

pressing the penetrable wire-in-film encapsulation over the carrier, the bond wire, and the integrated circuit with the sidewalls of the cavity having a characteristic of an intersecting bulge caused by compression and the cavity exposing a bond pad of the integrated circuit;

curing the penetrable wire-in-film encapsulation; and

attaching an external interconnect below the carrier.

7. The method as claimed in claim 6 wherein connecting the carrier and the integrated circuit includes connecting a substrate and an integrated circuit die.

8. The method as claimed in claim 6 wherein connecting the carrier and the integrated circuit includes connecting the carrier and a flip chip.

9. The method as claimed in claim 6 wherein connecting the carrier and the integrated circuit includes connecting the carrier and an inter-stacking module.

10. The method as claimed in claim 6 further comprising attaching a lid over the cavity and an optical area of the integrated circuit.

11. An integrated circuit package system comprising:

a carrier;

an integrated circuit over the carrier;

a bond wire connecting the carrier to the integrated circuit; and

a preformed penetrable wire-in-film encapsulation having a cavity with sidewalls over the carrier, the bond wire, and the integrated circuit with the sidewalls of the cavity having a characteristic of an intersecting bulge caused by compression and exposing a portion of the integrated circuit.

12. The system as claimed in claim 11 further comprising an electrical interconnect between the integrated circuit and the carrier.

13. The system as claimed in claim 11 wherein the penetrable wire-in-film encapsulation includes a penetrable film adhesive having a B-stage characteristic.

14. The system as claimed in claim 11 further comprising a device over the integrated circuit and in the cavity of the penetrable wire-in-filmencapsulation.

15. The system as claimed in claim 11 further comprising attaching a lid over the cavity and the integrated circuit.

16. The system as claimed in claim 11 wherein:

the integrated circuit includes a bond pad;

the penetrable wire-in-film encapsulation exposes the bond pad through the cavity; and

further comprising an external interconnect attached below and to the carrier.

17. The system as claimed in claim 16 wherein:

the carrier includes a substrate; and

the integrated circuit includes an integrated circuit die.

18. The system as claimed in claim 16 wherein the integrated circuit includes a flip chip.

19. The system as claimed in claim 16 wherein the integrated circuit includes an inter-stacking module.

20. The system as claimed in claim 16 further comprising a lid over the cavity and an optical area of the integrated circuit.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME PREVIOUSLY RECORDED AT REEL: 064789 FRAME: 0474 ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 8, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064842/0046 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 38378 FRAME: 0280) Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064789/0474 →
RELEASE OF SECURITY INTEREST Recorded Jun 9, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052879/0852 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0280 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2008
From: CHOW, SENG GUAN; HUANG, RUI; KUAN, HEAP HOE
To: STATS CHIPPAC LTD.
Reel/Frame 021157/0801 →