IP Library Granted Patent US 7,659,145
Granted Patent B2
US 7,659,145 · App. 12/172,817 · Granted Feb 9, 2010

Semiconductor device and method of forming stepped-down RDL and recessed THV in peripheral region of the device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,659,145
App. No.
12/172,817
Granted
Feb 9, 2010
Kind
B2
Abstract

A semiconductor die has a peripheral region around the die. An insulating layer is formed over the semiconductor die. A portion of the insulating layer and peripheral is removed to form a recess around the semiconductor die. A conductive layer is deposited over the insulating layer and recess. The conductive layer is electrically connected to contact pads on the semiconductor die and conforms to a step into the recess. A gap is created through the conductive layer and peripheral region around the semiconductor die. An insulating material is deposited in the gap. A portion of the insulating material is removed to form a through hole via (THV). A conductive material is deposited in the THV to form a conductive THV. The conductive THV is recessed with respect to a surface of the semiconductor die. The conductive THV is electrically connected to the conductive layer.

Claims (52)

1. A method of making a semiconductor device, comprising:

providing a semiconductor wafer having a plurality of semiconductor die each with a peripheral region around the semiconductor die;

forming an insulating layer over the semiconductor wafer;

removing a portion of the insulating layer and peripheral region to form a recess around the semiconductor die;

depositing a first conductive layer over the insulating layer and recess, the first conductive layer being electrically connected to contact pads on the semiconductor die and conforming to a step into the recess;

creating a gap through the first conductive layer and peripheral region around the semiconductor die;

depositing an insulating material in the gap;

removing a portion of the insulating material to form a through hole via (THV);

depositing a conductive material in the THV to form a conductive THV, the conductive THV being recessed with respect to a surface of the semiconductor die, the conductive THV being electrically connected to the first conductive layer; and

singulating the semiconductor wafer through the gap to separate the semiconductor die.

2. The method of claim 1 , wherein singulating the semiconductor wafer occurs through the conductive THV in the gap to form a conductive half-via.

3. The method of claim 1 , wherein singulating the semiconductor wafer occurs through the insulating material in the gap to form a conductive full-via.

4. The method of claim 1 , further including forming a masking layer over the insulating material prior to depositing the conductive material.

5. The method of claim 1 , further including removing a portion of the insulating layer to expose the contact pads.

6. The method of claim 1 , wherein creating the gap includes:

cutting through the semiconductor wafer less than a width of the peripheral region around the semiconductor die; and

moving the semiconductor die apart to expand the gap.

7. The method of claim 1 , further including forming a second conductive layer over the insulating material and conductive material to electrically connect the conductive material to the first conductive layer.

8. A method of making a semiconductor device, comprising:

providing a semiconductor wafer having a plurality of semiconductor die each with a peripheral region around the semiconductor die;

forming an insulating layer over the semiconductor wafer;

removing a portion of the insulating layer and peripheral region to form a recess around the semiconductor die;

creating a gap through the peripheral region around the semiconductor die;

depositing an insulating material in the gap;

depositing a conductive layer over the insulating layer and insulating material, the conductive layer being electrically connected to contact pads on the semiconductor die;

removing a portion of the insulating material to form a through hole via (THV);

depositing a conductive material in the THV to form a conductive THV, the conductive THV being electrically connected to the conductive layer; and

singulating the semiconductor wafer through the gap to separate the semiconductor die.

9. The method of claim 8 , wherein singulating the semiconductor wafer occurs through the conductive THV in the gap to form a conductive half-via.

10. The method of claim 8 , wherein singulating the semiconductor wafer occurs through the insulating material in the gap to form a conductive full-via.

11. The method of claim 8 , further including forming a masking layer over the insulating material prior to depositing the conductive material.

12. The method of claim 8 , further including removing a portion of the insulating layer to expose the contact pads.

13. The method of claim 8 , wherein creating the gap includes:

cutting through the semiconductor wafer less than a width of the peripheral region around the semiconductor die; and

moving the semiconductor die apart to expand the gap.

14. A method of making a semiconductor device, comprising:

providing a semiconductor die having a peripheral region around the semiconductor die;

forming an insulating layer over the semiconductor die;

removing a portion of the insulating layer and peripheral region to form a recess around the semiconductor die;

depositing a first conductive layer over the insulating layer and recess, the first conductive layer being electrically connected to contact pads on the semiconductor die and conforming to a step into the recess;

creating a gap through the first conductive layer and peripheral region around the semiconductor die;

depositing an insulating material in the gap;

removing a portion of the insulating material to form a through hole via (THV); and

depositing a conductive material in the THV to form a conductive THV, the conductive THV being recessed with respect to a surface of the semiconductor die, the conductive THV being electrically connected to the first conductive layer.

15. The method of claim 14 , wherein singulating the semiconductor wafer occurs through the conductive THV to form a conductive half-via.

16. The method of claim 14 , wherein singulating the semiconductor wafer occurs through the insulating material in the gap to form a conductive full-via.

17. The method of claim 14 , further including forming a masking layer over the insulating material prior to depositing the conductive material.

18. The method of claim 14 , further including removing a portion of the insulating layer to expose the contact pads.

19. The method of claim 14 , wherein creating the gap includes:

cutting through the semiconductor wafer less than a width of the peripheral region around the semiconductor die; and

moving the semiconductor die apart to expand the gap.

20. The method of claim 14 , further including forming a second conductive layer over the insulating material and conductive material to electrically connect the conductive material to the first conductive layer.

Assignments (6)
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0328 Recorded Aug 30, 2023
From: STATS CHIPPAC PTE. LTE.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064838/0948 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0328 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2008
From: DO, BYUNG TAI; PAGAILA, REZA A.; KUAN, HEAP HOE; CHUA, LINDA PEI EE
To: STATS CHIPPAC, LTD.
Reel/Frame 021235/0016 →