Method and apparatus for nano probing a semiconductor chip
View Patent ↗Various methods and apparatus for electrically probe testing a semiconductor chip with circuit perturbation are disclosed. In one aspect, a method of testing is provided that includes contacting a first nano probe to a conductor structure on a first side of a semiconductor chip. The semiconductor chip has plural circuit structures. A external stimulus is applied to a selected portion of the first side of the semiconductor chip to perturb at least one of the plural circuit structures. The semiconductor chip is caused to perform a test pattern during the application of the external stimulus. An electrical characteristic of the semiconductor chip is sensed with the first nano probe during performance of the test pattern.
1. A method of testing a semiconductor chip having plural circuit structures, comprising: testing a first of the plural circuit structures by (1) contacting with a first nano probe to a conductor structure on a first side of the semiconductor chip, (2) applying an external stimulus to a selected portion of the first side of the semiconductor chip to perturb the first of the plural circuit structures, (3) causing the semiconductor chip to perform a test pattern during the application of the external stimulus, and (4) sensing an electrical characteristic of the first of the plural circuit structures with the first nano probe during performance of the test pattern, the sensed electrical characteristic defining a reference electrical characteristic; testing a second of the plural circuit structures by (1) contacting with the first nano probe another conductor structure on a first side of the semiconductor chip, (2) applying an external stimulus to a selected portion of the first side of the semiconductor chip to perturb the second of the plural circuit structures, (3) causing the semiconductor chip to perform a test pattern during the application of the external stimulus, and (4) sensing an electrical characteristic of the second of the plural circuit structures with the first nano probe during performance of the test pattern; and comparing the sensed electrical characteristic of the second of the plural circuit structures with the reference electrical characteristic.
2. The method of claim 1 , wherein the applying an external stimulus comprises illuminating the selected portion with laser radiation.
3. The method of claim 2 , wherein the laser radiation is supplied by an optical fiber.
4. The method of claim 3 , wherein the optical fiber is coupled to the first nano probe.
5. The method of claim 1 , wherein the applying an external stimulus comprises applying heat to the selected portion of the first side.
6. The method of claim 5 , wherein the applying heat is performed by contacting another nano probe to the semiconductor chip.
7. An apparatus, comprising: a member for holding a semiconductor chip having a first side and plural circuit structures; a plurality of nano probes for contacting selected portions of the first side of the semiconductor chip, at least one of the plurality of nano probes being operable to sense an electrical characteristic of the at least one of the plural circuit structures; a stimulation source operable to apply an external stimulus to selected portions of the first side of the semiconductor chip to selectively perturb at least some of the plural circuit structures; wherein the apparatus is configured to perform a test pattern during application of the external stimulus to a selected portion and to sense an electrical characteristic of a first circuit structure by using the at least one of the nano probes to define a reference electrical characteristic; to perform a test pattern during application of the external stimulus to another selected portion and to sense an electrical characteristic of a second circuit structure by using the at least one of the nano probes; and to compare the sensed electrical characteristic of the second circuit structure with the reference electrical characteristic.
8. The apparatus of claim 7 , wherein the stimulation source comprises a laser source.
9. The apparatus of claim 8 , wherein the laser source comprises an optical fiber.
10. The apparatus of claim 9 , wherein the optical fiber is coupled to one of the plurality of nano probes.
11. The apparatus of claim 7 , wherein the stimulation source comprises a heat source.
12. The apparatus of claim 11 , wherein the heat source comprises one of the plurality of nano probes.
13. The apparatus of claim 7 , a computer system electrically coupled to the semiconductor chip to cause the semiconductor chip to perform a test pattern during application of external stimulus by the stimulation source.