IP Library Granted Patent US 7,741,148
Granted Patent B1
US 7,741,148 · App. 12/332,118 · Granted Jun 22, 2010

Semiconductor device and method of forming an interconnect structure for 3-D devices using encapsulant for structural support

Assignee: STATS ChipPAC, Ltd.
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Quick Facts
Patent No.
US 7,741,148
App. No.
12/332,118
Granted
Jun 22, 2010
Kind
B1
Abstract

A semiconductor device has a first interconnect structure formed over a first side of a substrate. A semiconductor die is mounted to the first interconnect structure. An encapsulant is deposited over the semiconductor die and first interconnect structure for structural support. A portion of a second side of the substrate, opposite the first side of the substrate, is removed to reduce its thickness. The encapsulant maintains substrate robustness during thinning process. A TSV is formed through the second side of the substrate to the first interconnect structure. A second interconnect structure is formed in the TSV. The TSV has a first insulating layer formed over the second side of the substrate and first conductive layer formed over the first insulating layer and into the TSV. The second interconnect structure has a second conductive layer formed over the first conductive layer in an area away from the TSV.

Claims (90)

1. A method of making a semiconductor device, comprising:

providing a substrate;

forming a first interconnect structure over a first side of the substrate by,

(a) forming a first conductive layer over the first side of the substrate,

(b) forming a first insulating layer over the first conductive layer and substrate,

(c) removing a portion of the first insulating layer to expose the first conductive layer,

(d) forming a second conductive layer over the first conductive layer,

(e) forming a second insulating layer over the second conductive layer and first insulating layer, and

(f) removing a portion of the second insulating layer to expose the second conductive layer;

mounting a semiconductor die or component to the first interconnect structure;

depositing an encapsulant over the semiconductor die or component and first interconnect structure;

removing a portion of a second side of the substrate, opposite the first side of the substrate, to reduce its thickness;

forming a through silicon via (TSV) through the second side of the substrate to the first interconnect structure; and

forming a second interconnect structure over the TSV.

2. The method of claim 1 , wherein forming the first interconnect structure further includes:

forming a conductive pillar over the second conductive layer;

forming a third insulating layer around the conductive pillar;

forming a third conductive layer over the conductive pillar; and

electrically connecting the semiconductor die or component to the third conductive layer.

3. The method of claim 1 , further including mounting the semiconductor device to a printed circuit board through the second interconnect structure.

4. A method of making a semiconductor device, comprising:

providing a substrate;

forming a first interconnect structure over a first side of the substrate;

mounting a semiconductor die or component to the first interconnect structure;

depositing an encapsulant over the semiconductor die or component and first interconnect structure;

removing a portion of a second side of the substrate, opposite the first side of the substrate, to reduce its thickness;

forming a through silicon via (TSV) through the second side of the substrate to the first interconnect structure by,

(a) forming a first insulating layer over the second side of the substrate, and

(b) removing a portion of the first insulating layer over the first interconnect structure; and

forming a second interconnect structure over the TSV.

5. The method of claim 4 , wherein forming the second interconnect structure includes forming a first conductive layer over the first insulating layer and into the TSV.

6. The method of claim 5 , wherein forming the second interconnect structure further includes:

forming a second conductive layer over the first conductive layer in an area away from the TSV; and

forming a solder bump on the second conductive layer.

7. A method of making a semiconductor device, comprising:

providing a substrate;

forming a first interconnect structure over the substrate by,

(a) forming a first conductive layer over the substrate,

(b) forming a first insulating layer over the first conductive layer and substrate,

(c) removing a portion of the first insulating layer to expose the first conductive layer,

(d) forming a second conductive layer over the first conductive layer,

(e) forming a second insulating layer over the second conductive layer and first insulating layer, and

(f) removing a portion of the second insulating layer to expose the second conductive layer;

mounting a semiconductor die or component to the first interconnect structure;

depositing an encapsulant over the semiconductor die or component and first interconnect structure;

removing at least a portion of the substrate to expose the first interconnect structure; and

forming a second interconnect structure over the first interconnect structure.

8. The method of claim 7 , wherein forming the first interconnect structure further includes:

forming a conductive pillar over the second conductive layer;

forming a third insulating layer around the conductive pillar;

forming a third conductive layer over the conductive pillar; and

electrically connecting the semiconductor die or component to the third conductive layer.

9. The method of claim 7 , further including mounting the semiconductor device to a printed circuit board through the second interconnect structure.

10. The method of claim 9 , wherein the semiconductor die or component is electrically connected to the printed circuit board through the first and second interconnect structures.

11. A method of making a semiconductor device, comprising:

providing a substrate;

forming a first interconnect structure over the substrate;

mounting a semiconductor die or component to the first interconnect structure;

depositing an encapsulant over the semiconductor die or component and first interconnect structure;

removing at least a portion of the substrate to expose the first interconnect structure; and

forming a second interconnect structure over the first interconnect structure by,

(a) forming a first insulating layer over the first interconnect structure,

(b) removing a portion of the first insulating layer, and

(c) forming a first conductive layer over the first insulating layer in the removed portion of the first insulating layer.

12. A method of making a semiconductor device, comprising:

providing a substrate;

forming a first interconnect structure over a first side of the substrate;

mounting a semiconductor die or component to the first interconnect structure;

depositing an encapsulant over the semiconductor die or component and first interconnect structure;

removing a portion of a second side of the substrate, opposite the first side of the substrate; and

forming a conductive through silicon via (TSV) through the substrate and electrically connecting the conductive TSV to the first interconnect structure by,

(a) forming a first insulating layer over the second side of the substrate, and

(b) removing a portion of the first insulating layer over the first interconnect structure.

13. The method of claim 12 , further including:

forming a second interconnect structure over the second side of the substrate; and

electrically connecting the second interconnect structure to the conductive TSV.

14. The method of claim 13 , wherein forming the second interconnect structure includes forming a first conductive layer over the first insulating layer and into the TSV.

15. The method of claim 13 , further including mounting the semiconductor device to a printed circuit board through the second interconnect structure.

16. The method of claim 12 , wherein forming the first interconnect structure includes:

forming a first conductive layer over the first side of the substrate;

forming a first insulating layer over the first conductive layer and substrate;

removing a portion of the first insulating layer to expose the first conductive layer;

forming a second conductive layer over the first conductive layer;

forming a second insulating layer over the second conductive layer and first insulating layer; and

removing a portion of the second insulating layer to expose the second conductive layer.

17. The method of claim 16 , wherein forming the first interconnect structure further includes:

forming a conductive pillar over the second conductive layer;

forming a third insulating layer around the conductive pillar;

forming a third conductive layer over the conductive pillar; and

electrically connecting the semiconductor die or component to the third conductive layer.

Assignments (6)
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0328 Recorded Aug 30, 2023
From: STATS CHIPPAC PTE. LTE.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064838/0948 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0328 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2008
From: MARIMUTHU, PANDI CHELVAM; HENG, KOCK LIANG; SUTHIWONGSUNTHORN, NATHAPONG
To: STATS CHIPPAC, LTD.
Reel/Frame 021957/0310 →