IP Library Granted Patent US 7,847,382
Granted Patent B2
US 7,847,382 · App. 12/412,064 · Granted Dec 7, 2010

Integrated circuit packaging system with package stacking and method of manufacture thereof

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Quick Facts
Patent No.
US 7,847,382
App. No.
12/412,064
Granted
Dec 7, 2010
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: forming an encapsulation surrounding an integrated circuit having an inactive side and an active side exposed; forming a hole through the encapsulation with the hole not exposing the integrated circuit; forming a through conductor in the hole; and mounting a substrate with the integrated circuit surrounded by the encapsulation with the active side facing the substrate.

Claims (58)

1. A method of manufacture of an integrated circuit packaging system comprising:

forming an encapsulation surrounding an integrated circuit having an inactive side and an active side exposed;

forming a hole through the encapsulation with the hole not exposing the integrated circuit;

forming a through conductor in the hole; and

mounting a substrate with the integrated circuit surrounded by the encapsulation with the active side facing the substrate.

2. The method as claimed in claim 1 wherein forming the encapsulation surrounding the integrated circuit having the inactive side and the active side exposed includes forming the encapsulation below the inactive side.

3. The method as claimed in claim 1 further comprising:

providing the substrate having a base opening; and

connecting a base device, inside the base opening, with the active side facing the base device.

4. The method as claimed in claim 1 further comprising:

forming a mountable contact over the through conductor or over the inactive side; and

connecting a stack package over the inactive side and over the through conductor.

5. The method as claimed in claim 1 wherein:

forming the through conductor includes forming the through conductor having a protrusion with the protrusion extended beyond the encapsulation; and

further comprising:

connecting a stack package over the inactive side and over the through conductor includes connecting the protrusion to the stack package and the substrate.

6. A method of manufacture of an integrated circuit packaging system comprising:

forming an encapsulation surrounding an integrated circuit having an inactive side and an active side exposed and the encapsulation is coplanar with the active side;

forming a hole through the encapsulation with the hole not exposing the integrated circuit;

forming a through conductor in the hole; and

mounting a substrate with the integrated circuit surrounded by the encapsulation with the active side facing the substrate and an electrical connector between the active side and the substrate.

7. The method as claimed in claim 6 wherein mounting the substrate with the integrated circuit surrounded by the encapsulation with the active side facing the substrate and the electrical connector between the active side and the substrate includes connecting the electrical connector and the through conductor.

8. The method as claimed in claim 6 wherein forming the encapsulation surrounding the integrated circuit having the inactive side and the active side exposed includes forming the encapsulation coplanar with the active side and the inactive side.

9. The method as claimed in claim 6 further comprising applying an underfill between the substrate and the encapsulation.

10. The method as claimed in claim 6 wherein:

forming the through conductor includes forming the through conductor having a protrusion with the protrusion extended beyond the encapsulation; and

further comprising:

connecting a stack package over the inactive side and over the through conductor includes connecting the protrusion to the stack package and the substrate; and

connecting an interconnect over the inactive side with the interconnect made of the same material as the through conductor.

11. An integrated circuit packaging system comprising:

an integrated circuit having an inactive side and an active side;

an encapsulation surrounding the integrated circuit with the inactive side and the active side exposed, and the encapsulation having a hole not exposing the integrated circuit;

a through conductor in the hole; and

a substrate mounted with the integrated circuit surrounded by the encapsulation with the active side facing the substrate.

12. The system as claimed in claim 11 wherein the encapsulation is below the inactive side.

13. The system as claimed in claim 11 wherein:

the substrate includes the substrate having a base opening; and

further comprising:

a base device, inside the base opening, with the active side facing the base device.

14. The system as claimed in claim 11 further comprising:

a mountable contact over the through conductor or over the inactive side; and

a stack package connected over the mountable contact.

15. The system as claimed in claim 11 wherein:

the through conductor includes a protrusion with the protrusion extended beyond the encapsulation; and

further comprising:

a stack package connected over the inactive side and over the through conductor includes the protrusion connected to the stack package and the substrate.

16. The system as claimed in claim 11 further comprising:

an electrical connector between the active side and the substrate; and

wherein:

the encapsulation is coplanar with the active side.

17. The system as claimed in claim 16 wherein the electrical connector is connected to the through conductor.

18. The system as claimed in claim 16 wherein the encapsulation is coplanar with the active side and the inactive side.

19. The system as claimed in claim 16 further comprising an underfill between the substrate and the encapsulation.

20. The system as claimed in claim 16 wherein:

the through conductor includes a protrusion with the protrusion extended beyond the encapsulation and the protrusion connected to the substrate; and

further comprising:

a stack package connected to the protrusion; and

an interconnect connected over the inactive side with the interconnect made of the same material as the through conductor.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0309. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 11, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065236/0767 →
RELEASE OF SECURITY INTEREST Recorded Jun 12, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052924/0007 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0309 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2009
From: PAGAILA, REZA ARGENTY; DO, BYUNG TAI
To: STATS CHIPPAC LTD.
Reel/Frame 022491/0565 →