Bipolar device having improved capacitance
View Patent ↗The invention, in one aspect, provides a semiconductor device that comprises a collector located in a semiconductor substrate and an isolation region located under the collector, wherein a peak dopant concentration of the isolation region is separated from a peak dopant concentration of the collector that ranges from about 0.9 microns to about 2.0 microns.
1. A semiconductor device, comprising:
a collector located in a semiconductor layer having a peak dopant concentration, wherein the semiconductor layer is one of either a doped region in a silicon wafer, or an epitaxial layer;
a base located in the collector and adjacent an upper surface of the semiconductor layer; and
an isolation region located within the semiconductor layer and under the collector and having a peak dopant concentration, wherein the peak dopant concentration of the isolation region is separated from the peak dopant concentration of the collector by a distance that ranges from about 0.9 microns to about 2.0 microns.
2. The device recited in claim 1 , wherein the distance is about 1.4 microns.
3. The device recited in claim 1 , wherein the peak dopant concentration of the collector is about 1E19 atoms/cm 3 and the peak dopant concentration of the isolation region ranges from about 2E17 atoms/cm 3 to about 5E17 atoms/cm 3 .
4. The device recited in claim 1 , further including contact isolation tubs located adjacent the collector and isolation tubs located below the contact isolation tubs, wherein doping profiles of the contact isolation tubs and the isolation tubs overlap.
5. The device recited in claim 4 , wherein a depth of the isolation region is greater than a depth of the isolation tubs.
6. The device recited in claim 4 , wherein a depth of the isolation tubs and the isolation region is substantially the same.
7. The device recited in claim 4 , wherein the collector is a collector for a vertical bipolar transistor that includes a base and an emitter includes and the device is an integrated circuit that comprises:
a plurality of the vertical bipolar transistors;
a plurality of non-bipolar transistors;
dielectric layers located over the non-bipolar transistors and vertical bipolar transistors; and
interconnects located in the dielectric layers that electrically connect the non-bipolar and vertical bipolar transistors.
8. The device recited in claim 1 , wherein the peak dopant concentration of the collector occurs at a depth about 0.8 microns as measured from the surface of the substrate.