Integrated circuit packaging system with bump contact on package leads and method of manufacture thereof

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a base panel having a first side with a cavity and a second side opposite the first side;

connecting an integrated circuit device and the first side;

applying a resist mask having an opening on the second side, the opening offset from the cavity;

forming a bump contact in the opening, the bump contact having a bump convex surface;

applying an encapsulation in the cavity over the integrated circuit device and the first side; and

forming a package lead by removing a portion of the base panel under the cavity, a flared tip of the package lead intersecting a base side of the encapsulation, and etching the base panel to form a maximum standoff height of the package lead from the base side.

2. The method as claimed in claim 1 further comprising removing the resist mask from the second side.

3. The method as claimed in claim 1 wherein forming the package lead includes etching a portion of the base panel from the second side to the cavity to expose the base side.

4. The method as claimed in claim 1 further comprising forming a die pad from the base panel.

5. A method of manufacture of an integrated circuit packaging system comprising:

providing a base panel having a first side with a cavity and a second side opposite the first side;

connecting an integrated circuit device and the first side;

applying a resist mask having an opening on the second side, the second side exposed in the opening offset from the cavity;

forming a bump contact on the second side in the opening, the bump contact having a bump convex surface;

removing the resist mask exposing the second side around the bump contact;

applying an encapsulation in the cavity and over the integrated circuit device and the first side; and

forming a package lead by removing a portion of the base panel under the cavity, a flared tip of the package lead intersecting a base side of the encapsulation and the bump contact on the package lead, and etching the base panel to a maximum standoff height from the base side to the bump convex surface.

6. The method as claimed in claim 5 wherein providing the base panel having the first side with the cavity includes:

forming a pre-plated layer on the base panel; and

forming the cavity in the base panel exposed by the pre-plated layer.

7. The method as claimed in claim 5 further comprising:

forming a die pad having a flared pad tip from the base panel; and

mounting the integrated circuit device over the die pad.