IP Library Granted Patent US 8,143,711
Granted Patent B2
US 8,143,711 · App. 12/831,822 · Granted Mar 27, 2012

Integrated circuit package system with offset stacking and anti-flash structure

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Quick Facts
Patent No.
US 8,143,711
App. No.
12/831,822
Granted
Mar 27, 2012
Kind
B2
Abstract

An integrated circuit package system includes: a carrier; a device structure in an offset location over the carrier with the device structure having a bond pad and a contact pad; an electrical interconnect between the bond pad and the carrier; an anti-flash structure over the device structure with the anti-flash structure exposing the contact pad; and a package encapsulation adjacent to the anti-flash structure and over the carrier.

Claims (21)

1. An integrated circuit package system comprising:

a carrier;

a device structure in an offset location over the carrier with the device structure having a bond pad and a contact pad;

an electrical interconnect between the bond pad and the carrier;

an anti-flash structure over the device structure with the anti-flash structure exposing the contact pad, a portion of the electrical interconnect in contact and conformally enclosed by the anti-flash structure; and

a package encapsulation adjacent to the anti-flash structure and over the carrier.

2. The system as claimed in claim 1 wherein the device structure is an interposer.

3. The system as claimed in claim 1 wherein the device structure is an integrated circuit device.

4. The system as claimed in claim 1 wherein the anti-flash structure over the device structure includes the anti-flash structure over a portion of the electrical interconnect over the bond pad.

5. The system as claimed in claim 1 further comprising a first integrated circuit device over the carrier.

6. The system as claimed in claim 1 further comprising:

an integrated circuit device over the carrier;

a passive device over the carrier; and

wherein the anti-flash structure is on the device structure.

7. The system as claimed in claim 6 further comprising:

an integrated circuit die over the carrier; and

wherein the device structure over the carrier includes:

the device structure over the integrated circuit die.

8. The system as claimed in claim 6 wherein the anti-flash structure includes the anti-flash structure over a side of the device structure onto the carrier.

9. The system as claimed in claim 6 wherein the device structure in the offset location over the carrier includes the device structure with a side of the device structure not parallel to an edge of the carrier.

10. The system as claimed in claim 6 further comprising a mounting device over the device structure within the anti-flash structure.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME PREVIOUSLY RECORDED AT REEL: 064789 FRAME: 0474 ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 8, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064842/0046 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 38378 FRAME: 0280) Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064789/0474 →
RELEASE OF SECURITY INTEREST Recorded Jun 9, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052879/0852 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0280 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →