IP Library Granted Patent US 8,378,477
Granted Patent B2
US 8,378,477 · App. 12/882,067 · Granted Feb 19, 2013

Integrated circuit packaging system with film encapsulation and method of manufacture thereof

Inventors: Byung Tai Do (Singapore, SG); Linda Pei Ee Chua (Singapore, SG); Reza Argenty Pagaila (Singapore, SG)
Assignee: Stats Chippac Ltd.
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Quick Facts
Patent No.
US 8,378,477
App. No.
12/882,067
Granted
Feb 19, 2013
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: providing a package substrate having a substrate bottom side and a substrate top side opposite the substrate bottom side; mounting an integrated circuit over the package substrate, the integrated circuit having an inactive side and an active side opposite the inactive side; connecting stack connectors to the substrate top side; applying a multi-layer film over the substrate top side, the integrated circuit, and the stack connectors, the multi-layer film having a base film layer, a penetrable film layer, and a penetrable adhesive; removing the base film layer and the penetrable film layer to expose the penetrable adhesive and exposed portions of the stack connectors; and forming an adhesive film layer by hardening the penetrable adhesive.

Claims (45)

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a package substrate having a substrate bottom side and a substrate top side opposite the substrate bottom side;

mounting an integrated circuit over the package substrate;

connecting stack connectors to the substrate top side;

applying a multi-layer film over the substrate top side, the integrated circuit, and the stack connectors, the multi-layer film having a base film layer, a penetrable film layer, and a penetrable adhesive;

removing the base film layer and the penetrable film layer to expose the penetrable adhesive and exposed portions of the stack connectors; and

forming an adhesive film layer from the penetrable adhesive, with the adhesive film layer having a rough top surface characteristic of being formed from the penetrable film layer being removed.

2. The method as claimed in claim 1 wherein connecting the stack connectors includes connecting the stack connectors to the substrate top side surrounding the integrated circuit.

3. The method as claimed in claim 1 wherein connecting the stack connectors includes connecting the stack connectors to the substrate top side between the integrated circuit and a periphery of the package substrate.

4. The method as claimed in claim 1 wherein removing the base film layer and the penetrable film layer includes removing the base film layer and the penetrable film layer to expose the exposed portions protruding from the adhesive film layer.

5. The method as claimed in claim 1 wherein mounting the integrated circuit includes mounting a wirebond die over the package substrate.

6. A method of manufacture of an integrated circuit packaging system comprising:

providing a package substrate having a substrate bottom side and a substrate top side opposite the substrate bottom side;

mounting an integrated circuit over the package substrate;

connecting device connectors to the substrate top side and the integrated circuit;

connecting stack connectors to the substrate top side;

applying a multi-layer film over the substrate top side, the integrated circuit, and the stack connectors, the multi-layer film having a base film layer, a penetrable film layer, and a penetrable adhesive;

removing the base film layer and the penetrable film layer to expose the penetrable adhesive and exposed portions of the stack connectors; and

forming an adhesive film layer from the penetrable adhesive, with the adhesive film layer having a rough top surface characteristic of being formed from the penetrable film layer being removed.

7. The method as claimed in claim 6 wherein mounting the integrated circuit includes mounting the integrated circuit over the package substrate, the integrated circuit having vertical insertion areas electrically connected to the device connectors.

8. The method as claimed in claim 6 wherein connecting the stack connectors includes:

connecting an interface module to the substrate top side; and

connecting the stack connectors to the interface module.

9. The method as claimed in claim 6 further comprising forming a redistribution layer on the adhesive film layer.

10. The method as claimed in claim 6 further comprising:

connecting bottom stack connectors to the substrate bottom side; and

forming a bottom adhesive film layer covering portions of the bottom stack connectors.

11. An integrated circuit packaging system comprising:

a package substrate having a substrate bottom side and a substrate top side opposite the substrate bottom side;

an integrated circuit over the package substrate;

stack connectors connected to the substrate top side; and

an adhesive film layer over the substrate top side covering the integrated circuit and exposing exposed portions of the stack connectors, the adhesive film layer having a rough top surface characteristic of a penetrable film layer being removed from a penetrable adhesive.

12. The system as claimed in claim 11 wherein the stack connectors are connected to the substrate top side surrounding the integrated circuit.

13. The system as claimed in claim 11 wherein the stack connectors are connected to the substrate top side between the integrated circuit and a periphery of the package substrate.

14. The system as claimed in claim 11 wherein the integrated circuit is a flip chip over the package substrate.

15. The system as claimed in claim 11 wherein the integrated circuit is a wirebond die over the package substrate.

16. The system as claimed in claim 11 further comprising device connectors connected to the substrate top side and the integrated circuit.

17. The system as claimed in claim 16 wherein the integrated circuit is over the package substrate, the integrated circuit having vertical insertion areas electrically connected to the device connectors.

18. The system as claimed in claim 16 further comprising:

an interface module connected to the substrate top side; and wherein:

the stack connectors are connected to the interface module.

19. The system as claimed in claim 16 further comprising a redistribution layer on the adhesive film layer.

20. The system as claimed in claim 16 further comprising:

bottom stack connectors connected to the substrate bottom side; and

a bottom adhesive film layer covering portions of the bottom stack connectors.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON THE COVER SHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 038378 FRAME 0244. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065239/0786 →
RELEASE OF SECURITY INTEREST Recorded Jun 5, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052850/0237 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0244 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2010
From: DO, BYUNG TAI; CHUA, LINDA PEI EE; PAGAILA, REZA ARGENTY
To: STATS CHIPPAC LTD.
Reel/Frame 025074/0099 →
Continuity (1)
Related Publication 20120061855A1 · Mar 15, 2012