IP Library Granted Patent US 8,513,788
Granted Patent B2
US 8,513,788 · App. 13/326,173 · Granted Aug 20, 2013

Integrated circuit packaging system with pad and method of manufacture thereof

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,513,788
App. No.
13/326,173
Granted
Aug 20, 2013
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: forming a peripheral lead having a peripheral lead bottom side, a peripheral lead top side, a peripheral lead non-horizontal side, and a peripheral lead horizontal ridge protruding from the peripheral lead non-horizontal side; forming a first top distribution layer on the peripheral lead top side; connecting an integrated circuit to the first top distribution layer; and applying an insulation layer directly on a distribution layer bottom extent of the first top distribution layer and a peripheral lead ridge lower side of the peripheral lead horizontal ridge with a cavity in the portion of the insulation layer directly below the integrated circuit.

Claims (48)

1. A method of manufacture of an integrated circuit packaging system comprising:

forming a peripheral lead having a peripheral lead bottom side, a peripheral lead top side, a peripheral lead non-horizontal side, and a peripheral lead horizontal ridge protruding from the peripheral lead non-horizontal side;

forming a first top distribution layer on the peripheral lead top side;

connecting an integrated circuit to the first top distribution layer; and

applying an insulation layer directly on a distribution layer bottom extent of the first top distribution layer and a peripheral lead ridge lower side of the peripheral lead horizontal ridge with a cavity in the portion of the insulation layer directly below the integrated circuit.

2. The method as claimed in claim 1 further comprising:

forming a package paddle between the peripheral lead and another of the peripheral lead; and

wherein:

applying the insulation layer includes exposing the package paddle in the cavity.

3. The method as claimed in claim 1 further comprising forming a conductive cap directly on the peripheral lead top side.

4. The method as claimed in claim 1 wherein forming the peripheral lead includes forming a peripheral lead step portion protruding from the peripheral lead top side.

5. The method as claimed in claim 1 further comprising forming a central lead directly under the integrated circuit.

6. A method of manufacture of an integrated circuit packaging system comprising:

forming a peripheral lead having a peripheral lead bottom side, a peripheral lead top side, a peripheral lead conductive plate at the peripheral lead bottom side, and a peripheral lead non-horizontal side with a peripheral lead horizontal ridge protruding from the peripheral lead non-horizontal side;

forming a first top distribution layer on the peripheral lead top side;

connecting an integrated circuit to the first top distribution layer;

forming an encapsulation over the integrated circuit and the first top distribution layer; and

applying an insulation layer directly on a distribution layer bottom extent of the first top distribution layer and a peripheral lead ridge lower side of the peripheral lead horizontal ridge with a cavity in the portion of the insulation layer directly below the integrated circuit.

7. The method as claimed in claim 6 wherein forming the peripheral lead includes forming the peripheral lead having the peripheral lead conductive plate with a recess at the peripheral lead bottom side.

8. The method as claimed in claim 6 further comprising:

forming a conductive cap directly on the peripheral lead top side; and

wherein:

forming the first top distribution layer includes forming the first top distribution layer directly on the conductive cap and having a distribution layer conductive material.

9. The method as claimed in claim 6 wherein:

forming the peripheral lead includes forming a peripheral lead step portion protruding from the peripheral lead top side; and

wherein:

forming the first top distribution layer includes forming the first top distribution layer having a peripheral distribution step portion directly on the peripheral lead step portion.

10. The method as claimed in claim 6 further comprising forming a central lead directly under the integrated circuit and adjacent the peripheral lead.

11. An integrated circuit packaging system comprising:

a peripheral lead having a peripheral lead bottom side, a peripheral lead top side, a peripheral lead non-horizontal side, and a peripheral lead horizontal ridge protruding from the peripheral lead non-horizontal side;

a first top distribution layer on the peripheral lead top side;

an integrated circuit connected to the first top distribution layer; and

an insulation layer directly on a distribution layer bottom extent of the first top distribution layer and a peripheral lead ridge lower side of the peripheral lead horizontal ridge with a cavity in the portion of the insulation layer directly below the integrated circuit.

12. The system as claimed in claim 11 further comprising a package paddle between the peripheral lead and another of the peripheral lead with the package paddle exposed in the cavity.

13. The system as claimed in claim 11 further comprising a conductive cap directly on the peripheral lead top side.

14. The system as claimed in claim 11 wherein the peripheral lead includes a peripheral lead step portion protruding from the peripheral lead top side.

15. The system as claimed in claim 11 further comprising a central lead directly under the integrated circuit.

16. The system as claimed in claim 11 further comprising the peripheral lead having a recess at the peripheral lead bottom side.

17. The system as claimed in claim 16 wherein the peripheral lead includes the peripheral lead conductive plate with a recess at the peripheral lead bottom side and with a lead plate conductive material.

18. The system as claimed in claim 16 further comprising:

a conductive cap directly on the peripheral lead top side; and

wherein:

the first top distribution layer is directly on the conductive cap and has a distribution layer conductive material.

19. The system as claimed in claim 16 wherein:

the peripheral lead includes a peripheral lead step portion protruding from the peripheral lead top side; and

wherein:

the first top distribution layer includes a peripheral distribution step portion directly on the peripheral lead step portion.

20. The system as claimed in claim 16 further comprising a central lead directly under the integrated circuit and adjacent the peripheral lead.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0235. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065236/0741 →
RELEASE OF SECURITY INTEREST Recorded Jun 5, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052850/0237 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0235 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 23, 2012
From: DO, BYUNG TAI; TRASPORTO, ARNEL SENOSA; CHUA, LINDA PEI EE
To: STATS CHIPPAC LTD.
Reel/Frame 028614/0615 →