Double-Sided Semiconductor Device and Method of Forming Top-Side and Bottom-Side Interconnect Structures
A semiconductor device is made by forming a first active device on a first side of a semiconductor wafer. A first insulating layer is formed over the first side of the wafer. A first conductive layer is formed over the first insulating layer. A first interconnect structure is formed over the first insulating layer and first conductive layer. A temporary carrier is mounted to the first interconnect structure. A second active device is formed on a second side of the semiconductor wafer. A second insulating layer is formed over the second side of the wafer. A second conductive layer is formed over the second insulating layer. A second interconnect structure is formed over the second insulating layer and second conductive layer. The temporary carrier is removed, leaving a double-sided semiconductor device. The double-sided semiconductor device is enclosed in a package with the first and second interconnect structures electrically connected.
1 . A semiconductor device, comprising:
a double-sided semiconductor wafer having a first active region formed over a first surface of the double-sided semiconductor wafer and second active region formed over a second surface of the double-sided semiconductor wafer opposite the first surface;
a first multi-layered interconnect structure formed over the first surface of the double-sided semiconductor wafer;
a second multi-layered interconnect structure formed over the second surface of the double-sided semiconductor wafer; and
an encapsulant deposited over the double-sided semiconductor wafer, first multi-layered interconnect structure, and second multi-layered interconnect structure.
2 . The semiconductor device of claim 1 , further including a third interconnect structure formed over the first multi-layered interconnect structure and encapsulant.
3 . The semiconductor device of claim 2 , further including a plurality of bond wires formed through the encapsulant between the second multi-layered interconnect structure and third interconnect structure.
4 . The semiconductor device of claim 1 , wherein the first multi-layered interconnect structure includes:
a first conductive layer;
an insulating layer formed over the first conductive layer; and
a second conductive layer formed over the insulating layer.
5 . The semiconductor device of claim 1 , wherein the first active region or second active region of the double-sided semiconductor wafer includes a bipolar transistor.
6 . The semiconductor device of claim 1 , further including a conductive via formed through the double-sided semiconductor wafer between the first multi-layered interconnect structure and second multi-layered interconnect structure.
7 . A semiconductor device, comprising:
a semiconductor die having a first active region formed over a first surface of the semiconductor die and second active region formed over a second surface of the semiconductor die opposite the first surface;
a first interconnect structure formed over an entirety of the first surface of the semiconductor die;
a second interconnect structure formed over an entirety of the second surface of the semiconductor die; and
an encapsulant deposited over the semiconductor die, first interconnect structure, and second interconnect structure.
8 . The semiconductor device of claim 7 , further including a third interconnect structure formed over the first interconnect structure and encapsulant.
9 . The semiconductor device of claim 8 , wherein the third interconnect structure includes:
a conductive layer;
an insulating layer formed over the conductive layer; and
a plurality of bumps formed over the conductive layer.
10 . The semiconductor device of claim 8 , further including a bond wire formed through the encapsulant between the second interconnect structure and third interconnect structure.
11 . The semiconductor device of claim 7 , further including an integrated passive device formed over the first surface or second surface of the semiconductor die.
12 . The semiconductor device of claim 7 , wherein the first active region or second active region of the semiconductor die includes a bipolar transistor.
13 . The semiconductor device of claim 7 , further including a conductive via formed through the semiconductor die between the first interconnect structure and second interconnect structure.
14 . A semiconductor device, comprising:
a semiconductor die having a first active region formed over a first surface of the semiconductor die and second active region formed over a second surface of the semiconductor die opposite the first surface;
a first interconnect structure formed over the first surface of the semiconductor die;
a second interconnect structure formed over the second surface of the semiconductor die; and
an encapsulant deposited over the semiconductor die.
15 . The semiconductor device of claim 14 , further including a third interconnect structure formed over the first interconnect structure and encapsulant.
16 . The semiconductor device of claim 15 , further including a bond wire formed through the encapsulant between the second interconnect structure and third interconnect structure.
17 . The semiconductor device of claim 14 , further including an integrated passive device formed over the first surface or second surface of the semiconductor die.
18 . The semiconductor device of claim 14 , wherein the first active region or second active region of the semiconductor die includes a bipolar transistor.
19 . The semiconductor device of claim 14 , further including a conductive via formed through the semiconductor die between the first interconnect structure and second interconnect structure.
20 . A semiconductor device, comprising:
a semiconductor die having a first active region formed over a first surface of the semiconductor die and second active region formed over a second surface of the semiconductor die opposite the first surface;
a first interconnect structure formed over the first surface of the semiconductor die; and
an encapsulant deposited over the semiconductor die and first interconnect structure.
21 . The semiconductor device of claim 20 , further including a second interconnect structure formed over the second surface of the semiconductor die.
22 . The semiconductor device of claim 21 , further including a third interconnect structure formed over the first interconnect structure and encapsulant.
23 . The semiconductor device of claim 22 , further including a bond wire formed through the encapsulant between the second interconnect structure and third interconnect structure.
24 . The semiconductor device of claim 21 , further including a conductive via formed through the semiconductor die between the first interconnect structure and second interconnect structure.
25 . The semiconductor device of claim 20 , wherein the first active region or second active region of the semiconductor die includes a bipolar transistor.