Semiconductor device and method of forming protection and support structure for conductive interconnect structure

1. A method of making a semiconductor device, comprising:

providing a semiconductor wafer having a plurality of contact pads;

forming a first insulating layer over the semiconductor wafer and contact pads;

removing a portion of the first insulating layer to expose a first portion of the contact pads, while leaving a second portion of the contact pads covered by the first insulating layer;

forming an under bump metallization layer over the contact pads and the first insulating layer;

forming a plurality of bumps over the under bump metallization layer;

forming a second insulating layer over the semiconductor wafer to cover the first insulating layer, a sidewall of the under bump metallization layer, sidewall of the bumps, and upper surface of the bumps; and

removing a portion of the second insulating layer over a first portion of the sidewall of the bumps down to the first insulating layer, while maintaining coverage of the second insulating layer over a second portion of the sidewall of the bumps and over the sidewall of the under bump metallization layer to provide structural support for the bumps and prevent growth of inter-metallic compounds.

2. The method of claim 1 , wherein removing the portion of the second insulating layer further includes maintaining a thickness of the second insulating layer at the sidewall of the bumps greater than one fourth of a height of the bumps.

3. The method of claim 1 , wherein forming the bumps includes forming cylindrical bumps.

4. The method of claim 1 , wherein forming the bumps includes forming bumps with a rectangular cross-section.

5. The method of claim 1 , wherein forming the under bump metallization layer further includes:

forming an adhesion layer over the plurality of contact pads;

forming a barrier layer over the adhesion layer; and

forming a wetting layer over the barrier layer.

6. A method of making a semiconductor device, comprising:

providing a semiconductor wafer;

forming a plurality of vias into the semiconductor wafer;

forming a liner layer in the vias;

depositing conductive material over the liner layer in the vias to form a plurality of conductive vias;

removing a portion of the semiconductor wafer so the conductive vias extend above a surface of the semiconductor wafer;

removing a portion of the liner layer to expose the conductive material;

forming a conductive liner over the conductive material after removing the portion of the liner layer;

forming an insulating layer over the semiconductor wafer and the conductive vias; and

removing a portion of the insulating layer leaving the conductive liner extending above the insulating layer, while maintaining coverage of the insulating layer over a sidewall of the conductive vias to provide structural support for the conductive vias.

7. The method of claim 6 , wherein removing the portion of the insulating layer includes maintaining a thickness of the insulating layer greater than one fourth a height of the portion of the conductive vias that extends above the surface of the semiconductor wafer.

8. The method of claim 6 , further including:

forming a plurality of semiconductor die in the semiconductor wafer; and

singulating the semiconductor die.

9. The method of claim 6 , further including:

forming a conductive layer over and electrically connected to the conductive vias;

forming an insulating layer over the semiconductor wafer and the conductive layer; and

removing a portion of the insulating layer over the conductive layer to expose a surface area of the conductive layer greater than a surface area of an upper surface of the conductive vias.

10. The method of claim 6 , further including removing the portion of the insulating layer down to the semiconductor wafer.

11. A method of making a semiconductor device, comprising:

providing a semiconductor wafer;

forming a conductive interconnect structure through the semiconductor wafer and including a height extending above a surface of the semiconductor wafer;

forming an insulating layer over the semiconductor wafer and the conductive interconnect structure with the insulating layer including a height greater than the height of the conductive interconnect structure; and

removing a portion of the insulating layer to leave a sloped contour of the insulating layer over a sidewall of the conductive interconnect structure.

12. The method of claim 11 , wherein providing the semiconductor wafer further includes forming a plurality of semiconductor die in the semiconductor wafer.

13. The method of claim 11 , wherein forming the conductive interconnect structure further includes forming a plurality of conductive vias through the semiconductor wafer.

14. The method of claim 11 , further including forming one or more redistribution layers over and electrically connected to the conductive interconnect structure.

15. The method of claim 11 , wherein removing the portion of the insulating layer further includes maintaining a thickness of the insulating layer greater than one fourth the height of the conductive interconnect structure extending above the surface of the semiconductor wafer.

16. The method of claim 11 , further including removing the portion of the insulating layer down to the semiconductor wafer.

17. A method of making a semiconductor device, comprising:

providing a substrate;

forming an interconnect structure through the substrate and including a height extending above a surface of the substrate;

forming an insulating layer over the substrate and interconnect structure; and

removing a portion of the insulating layer to leave a sloped contour of the insulating layer over a portion of a sidewall of the interconnect structure.

18. The method of claim 17 , wherein removing the portion of the insulating layer further includes maintaining a thickness of the insulating layer greater than one fourth a height of the interconnect structure extending above a surface of the substrate.

19. The method of claim 17 , wherein forming the interconnect structure further includes forming a plurality of conductive vias through the substrate.

20. The method of claim 17 , further including forming one or more redistribution layers over and electrically connected to the interconnect structure.

21. The method of claim 17 , further including removing the portion of the insulating layer down to the substrate.