Semiconductor device and method of forming IPD in fan-out wafer level chip scale package
A semiconductor wafer contains semiconductor die. A first conductive layer is formed over the die. A resistive layer is formed over the die and first conductive layer. A first insulating layer is formed over the die and resistive layer. The wafer is singulated to separate the die. The die is mounted to a temporary carrier. An encapsulant is deposited over the die and carrier. The carrier and a portion of the encapsulant and first insulating layer is removed. A second insulating layer is formed over the encapsulant and first insulating layer. A second conductive layer is formed over the first and second insulating layers. A third insulating layer is formed over the second insulating layer and second conductive layer. A third conductive layer is formed over the third insulating layer and second conductive layer. A fourth insulating layer is formed over the third insulating layer and third conductive layer.
1. A semiconductor device, comprising:
a first semiconductor die including a first conductive layer formed over a surface of the first semiconductor die;
a first insulating layer formed over the first conductive layer;
an encapsulant deposited around the first semiconductor die;
a second conductive layer formed over the first insulating layer and first conductive layer;
a second insulating layer formed over the first insulating layer and encapsulant; and
a third conductive layer formed over the encapsulant a predetermined distance away from a footprint of the first semiconductor die and first insulating layer.
2. The semiconductor device of claim 1 , wherein the predetermined distance is at least 50 micrometers.
3. The semiconductor device of claim 1 , further including a third insulating layer formed over the second insulating layer and third conductive layer.
4. The semiconductor device of claim 1 , further including a resistive layer formed over the first conductive layer or the surface of the first semiconductor die.
5. The semiconductor device of claim 1 , wherein the third conductive layer is wound to exhibit inductive properties.
6. The semiconductor device of claim 1 , further including a second semiconductor die disposed adjacent to the first semiconductor die.
7. A semiconductor device, comprising:
a first semiconductor die;
an insulating layer formed over the first semiconductor die;
an encapsulant deposited around the first semiconductor die and over a side surface of the insulating layer; and
a first integrated passive device (IPD) formed over the encapsulant a predetermined distance away from a footprint of the first semiconductor die.
8. The semiconductor device of claim 7 , wherein the first IPD includes a conductive layer wound over the encapsulant to exhibit inductive properties.
9. The semiconductor device of claim 7 , wherein the predetermined distance is at least 50 micrometers.
10. The semiconductor device of claim 7 , further including a second IPD formed over the first semiconductor die.
11. The semiconductor device of claim 10 , wherein the second IPD includes a capacitor.
12. The semiconductor device of claim 7 , wherein the encapsulant is coplanar with the first semiconductor die.
13. The semiconductor device of claim 7 , further including a second semiconductor die disposed adjacent to the first semiconductor die.
14. A semiconductor device, comprising:
a first semiconductor die;
a first insulating layer formed over the first semiconductor die;
an encapsulant deposited around the first semiconductor die and over a side surface of the first insulating layer; and
an interconnect structure formed over the encapsulant and first semiconductor die, the interconnect structure including an inductor disposed over the encapsulant a predetermined distance away from a footprint of the first semiconductor die.
15. The semiconductor device of claim 14 , wherein the capacitor includes:
a first conductive layer formed over a surface of the first semiconductor die;
a second insulating layer formed over the first conductive layer; and
a second conductive layer formed over the second insulating layer and first conductive layer.
16. The semiconductor device of claim 15 , further including a resistive layer formed over the first conductive layer or the surface of the first semiconductor die.
17. The semiconductor device of claim 14 , wherein the inductor includes a conductive layer wound over the encapsulant to exhibit inductive properties.
18. The semiconductor device of claim 14 , wherein the predetermined distance is at least 50 micrometers.
19. The semiconductor device of claim 14 , wherein the encapsulant is coplanar with the first semiconductor die.
20. The semiconductor device of claim 14 , further including a second semiconductor die disposed adjacent to the first semiconductor die.
21. A semiconductor device, comprising:
a first semiconductor die;
an insulating layer formed over the first semiconductor die;
an encapsulant deposited around the first semiconductor die and over a side surface of the insulating layer; and
an interconnect structure formed over the encapsulant and first semiconductor die, the interconnect structure including a first integrated passive device (IPD) disposed over the encapsulant a predetermined distance away from a footprint of the first semiconductor die.
22. The semiconductor device of claim 21 , wherein the predetermined distance is at least 50 micrometers.
23. The semiconductor device of claim 21 , further including a second IPD formed over the first semiconductor die.
24. The semiconductor device of claim 23 , wherein the second IPD includes a capacitor.
25. The semiconductor device of claim 21 , further including a second semiconductor die disposed adjacent to the first semiconductor die.