Semiconductor device and method of forming base substrate with cavities formed through etch-resistant conductive layer for bump locking
View Patent ↗A semiconductor device has a base substrate with first and second etch-resistant conductive layers formed over opposing surfaces of the base substrate. First cavities are etched in the base substrate through an opening in the first conductive layer. The first cavities have a width greater than a width of the opening in the first conductive layer. Second cavities are etched in the base substrate between portions of the first or second conductive layer. A semiconductor die is mounted over the base substrate with bumps disposed over the first conductive layer. The bumps are reflowed to electrically connect to the first conductive layer and cause bump material to flow into the first cavities. An encapsulant is deposited over the die and base substrate. A portion of the base substrate is removed down to the second cavities to form electrically isolated base leads between the first and second conductive layers.
1. A semiconductor device, comprising:
a substrate;
a first conductive layer formed over a plurality of protrusions of the substrate;
a plurality of cavities formed in the protrusions of the substrate through openings in the first conductive layer, wherein a width of the cavities is greater than a width of the openings in the first conductive layer;
a semiconductor die disposed over the substrate; and
a bump material bonding the semiconductor die to the first conductive layer by extending the bump material into the cavities through the openings in the first conductive layer.
2. The semiconductor device of claim 1 , further including an encapsulant deposited over the semiconductor die and substrate.
3. The semiconductor device of claim 1 , further including a second conductive layer formed over a surface of the substrate opposite the protrusions of the substrate.
4. The semiconductor device of claim 3 , wherein portions of the substrate are electrically isolated to form conductive leads vertically aligned between the first conductive layer and second conductive layer.
5. The semiconductor device of claim 1 , wherein the bump material extends into the cavities by thermo-compression or reflow of the bump material.
6. The semiconductor device of claim 1 , wherein the substrate includes copper, copper alloy, aluminum, or conductive material.
7. A semiconductor device, comprising:
a substrate;
a first conductive layer formed over a first surface of the substrate;
a cavity formed in the substrate through an opening in the first conductive layer;
a semiconductor die disposed over the substrate; and
a bump material disposed between the opening in the first conductive layer and semiconductor die with the bump material extending into the cavity through the opening in the first conductive layer and filling the cavity.
8. The semiconductor device of claim 7 , wherein a width of the cavity is greater than a width of the opening in the first conductive layer.
9. The semiconductor device of claim 7 , further including an encapsulant deposited over the semiconductor die and substrate.
10. The semiconductor device of claim 7 , further including a second conductive layer formed over a second surface of the substrate opposite the first surface of the substrate.
11. The semiconductor device of claim 10 , wherein portions of the substrate are electrically isolated to form conductive leads vertically aligned between the first conductive layer and second conductive layer.
12. The semiconductor device of claim 7 , wherein the bump material extends into the cavities by thermo-compression or reflow of the bump material.
13. The semiconductor device of claim 7 , wherein the substrate includes copper, copper alloy, aluminum, or conductive material.
14. A semiconductor device, comprising:
a substrate;
a first conductive layer formed over a first surface of the substrate;
a cavity formed in the substrate through an opening in the first conductive layer; and
a bump material extending into the cavity through the opening in the first conductive layer.
15. The semiconductor device of claim 14 , wherein a width of the cavity is greater than a width of the opening in the first conductive layer.
16. The semiconductor device of claim 14 , further including a semiconductor die disposed over the substrate.
17. The semiconductor device of claim 16 , further including an encapsulant deposited over the semiconductor die and substrate.
18. The semiconductor device of claim 14 , further including a second conductive layer formed over a second surface of the substrate opposite the first surface of the substrate.
19. The semiconductor device of claim 18 , wherein portions of the substrate are electrically isolated to form conductive leads vertically aligned between the first conductive layer and second conductive layer.
20. The semiconductor device of claim 14 , wherein the substrate includes copper, copper alloy, aluminum, or conductive material.
21. A semiconductor device, comprising:
a substrate;
a conductive layer formed over a protrusion of the substrate;
a cavity formed in the protrusion of the substrate through an opening in the conductive layer, wherein a width of the cavity is greater than a width of the opening in the conductive layer; and
a bump material disposed over the conductive layer and extending into the cavity.
22. The semiconductor device of claim 21 , wherein portions of the substrate are electrically isolated to form conductive leads vertically aligned with the conductive layer.
23. The semiconductor device of claim 21 , further including a semiconductor die disposed over the substrate.
24. The semiconductor device of claim 23 , further including an encapsulant deposited over the semiconductor die and substrate.
25. A semiconductor device, comprising:
a substrate;
a conductive layer formed over a protrusion of the substrate; and
a bump material extending into a cavity of the protrusion of the substrate through an opening in the conductive layer.
26. The semiconductor device of claim 25 , further including a recess formed adjacent to the cavity of the protrusion of the substrate.
27. The semiconductor device of claim 25 , wherein portions of the substrate are electrically isolated to form conductive leads vertically aligned with the conductive layer.
28. The semiconductor device of claim 25 , further including a semiconductor die disposed over the substrate with the bump material bonding the semiconductor die to the substrate.
29. The semiconductor device of claim 28 , further including an encapsulant deposited over the semiconductor die and substrate.