IP Library Granted Patent US 9,515,016
Granted Patent B2
US 9,515,016 · App. 13/682,281 · Granted Dec 6, 2016

Semiconductor package and method of forming z-direction conductive posts embedded in structurally protective encapsulant

Inventors: Rui Huang (Singapore, SG); Il Kwon Shim (Singapore, SG); Seng Guan Chow (Singapore, SG); Heap Hoe Kuan (Singapore, SG)
Assignee: STATS ChipPAC Pte. Ltd.
H01L23/49811H01L21/56H01L21/561H01L21/6835H01L23/49816H01L23/49833H01L23/5389H01L24/19H01L24/20H01L24/96H01L24/97H01L25/105H01L21/568H01L23/3128H01L24/48H01L2221/68345H01L2224/0401H01L2224/04105H01L2224/12105H01L2224/16225H01L2224/48091H01L2224/73265H01L2224/97H01L2225/1035H01L2225/1058H01L2924/0103H01L2924/014H01L2924/01006H01L2924/01013H01L2924/01029H01L2924/01033H01L2924/01047H01L2924/01073H01L2924/01078H01L2924/01079H01L2924/01082H01L2924/01322H01L2924/09701H01L2924/12041H01L2924/12042H01L2924/1306H01L2924/13091H01L2924/14H01L2924/1433H01L2924/15174H01L2924/15311H01L2924/15331H01L2924/181H01L2924/18161H01L2924/19041H01L2924/19042H01L2924/19043H01L2924/30105H01L2924/3511
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Quick Facts
Patent No.
US 9,515,016
App. No.
13/682,281
Granted
Dec 6, 2016
Kind
B2
Abstract

A semiconductor package is made using a prefabricated post carrier including a base plate and plurality of conductive posts. A film encapsulant is disposed over the base plate of the post carrier and around the conductive posts. A semiconductor die is mounted to a temporary carrier. The post carrier and temporary carrier are pressed together to embed the semiconductor die in the film encapsulant. The semiconductor die is disposed between the conductive posts in the film encapsulant. The temporary carrier and base plate of the post carrier are removed. A first circuit build-up layer is formed over a first side of the film encapsulant. The first circuit build-up layer is electrically connected to the conductive posts. A second circuit build-up layer is formed over a second side of the film encapsulant opposite the first side. The second circuit build-up layer is electrically connected to the conductive posts.

Claims (34)

1. A semiconductor device, comprising:

a base plate including a plurality of conductive posts physically connected to and extending from the base plate;

an encapsulant disposed over the base plate and around the conductive posts including a height of the encapsulant equal to a height of the conductive posts; and

a semiconductor die embedded within the encapsulant between the conductive posts including a height of the semiconductor die less than the height of the conductive posts.

2. The semiconductor device of claim 1 , further including a first interconnect structure formed over a first surface of the encapsulant, the first interconnect structure being electrically connected to the conductive posts.

3. The semiconductor device of claim 1 , wherein the encapsulant includes a first film encapsulant overlaying a second film encapsulant.

4. The semiconductor device of claim 1 , wherein the conductive posts are arranged around the semiconductor die.

5. A semiconductor device, comprising:

a prefabricated base plate including a plurality of conductive posts physically connected to and extending from the prefabricated base plate;

a film encapsulant deposited over the prefabricated base plate and around the conductive posts; and

a semiconductor die embedded within the film encapsulant with major surfaces of the semiconductor die disposed within a height of the conductive posts.

6. The semiconductor device of claim 5 , further including:

a first interconnect structure formed over a first surface of the film encapsulant, the first interconnect structure being electrically connected to the conductive posts.

7. The semiconductor device of claim 5 , wherein a surface of the film encapsulant is coplanar with a surface of the conductive posts opposite the base plate.

8. The semiconductor device of claim 5 , wherein the conductive posts are disposed around the semiconductor die.

9. A semiconductor device, comprising:

a base plate including a plurality of conductive posts physically connected to and extending from the base plate;

an encapsulant deposited over the base plate and around the plurality of conductive posts with a surface of the encapsulant coplanar with a surface of the conductive posts opposite the base plate; and

a semiconductor die embedded within the encapsulant with major surfaces of the semiconductor die disposed within a height of the conductive posts.

10. The semiconductor device of claim 9 , further including a first interconnect structure formed over a first surface of the encapsulant, the first interconnect structure being electrically connected to the conductive posts.

11. The semiconductor device of claim 9 , wherein the encapsulant includes a powder molding compound.

12. The semiconductor device of claim 9 , wherein the encapsulant includes:

a first film encapsulant deposited over the base plate and around the conductive posts; and

a second film encapsulant deposited over the first film encapsulant.

13. The semiconductor device of claim 9 , wherein the conductive posts are disposed around the semiconductor die.

14. A semiconductor device, comprising:

a base plate including a conductive post physically connected to and extending from the base plate; and

a semiconductor die disposed adjacent to the conductive post.

15. The semiconductor device of claim 14 , further including:

an encapsulant disposed over the base plate; and

a first interconnect structure formed over a first surface of the encapsulant, the first interconnect structure being electrically connected to the conductive post.

16. The semiconductor device of claim 15 , wherein the first surface of the encapsulant is coplanar with a surface of the conductive post opposite the base plate.

17. The semiconductor device of claim 15 , wherein the encapsulant includes a first film encapsulant overlaying a second film encapsulant.

18. The semiconductor device of claim 14 , further including a plurality of conductive posts extending from the base plate and arranged around the semiconductor die.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVERSHEET FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED ON REEL 038378 FRAME 0418. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064908/0920 →
RELEASE OF SECURITY INTEREST Recorded Jun 17, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 053511/0298 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0418 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
Continuity (3)
Continuation 13174033 · Jun 30, 2011
Division 12329458 · Dec 5, 2008
Related Publication 20130075899A1 · Mar 28, 2013