IP Library Granted Patent US 9,244,785
Granted Patent B2
US 9,244,785 · App. 14/135,456 · Granted Jan 26, 2016

Simulated power failure and data hardening

Inventors: Gregg S. Lucas (Tucson, AZ); Kenneth B. Delpapa (Natick, MA); Robert W. Ellis (Phoenix, AZ)
Assignee: SANDISK ENTERPRISE IP LLC
G06F11/2017G06F3/0619G06F11/1441G06F12/0246
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Quick Facts
Patent No.
US 9,244,785
App. No.
14/135,456
Granted
Jan 26, 2016
Kind
B2
Abstract

The various implementations described herein include systems, methods and/or devices used to enable power sequencing and data hardening in a storage device. In one aspect, a method includes, in response to a first signal received by the storage device, performing a soft power fail operation on a first section of the storage device. The soft power fail operation including: (1) signaling a power fail condition to a first plurality of controllers on the storage device, where the first plurality of controllers correspond to the first section of the storage device, (2) transferring data held in volatile memory of the storage device to non-volatile memory of the storage device, and (3) removing power from the first plurality of controllers.

Claims (59)

1. A method of protecting data in a storage device comprising volatile memory and non-volatile memory, the method comprising:

in response to receiving or detecting a first signal to simulate a power failure, performing a soft power fail operation on a first section of the storage device, the soft power fail operation including:

signaling a power fail condition to a first plurality of controllers on the storage device, wherein the first plurality of controllers correspond to the first section of the storage device;

transferring data held in the volatile memory of the storage device to the non-volatile memory of the storage device; and

removing power from the first plurality of controllers.

2. The method of claim 1 , wherein the first plurality of controllers includes at least one non-volatile storage controller and at least one other storage controller.

3. The method of claim 1 , wherein the first plurality of controllers includes a storage controller and one or more non-volatile memory (NVM) controllers, the one or more NVM controllers coupled by the storage controller to a host interface of the storage device.

4. The method of claim 3 , wherein transferring data held in the volatile memory of the storage device to the non-volatile memory of the storage device includes:

transferring data from the storage controller to the one or more NVM controllers; and

transferring data from the one or more NVM controllers to the non-volatile memory.

5. The method of claim 4 , wherein removing power from the first plurality of controllers includes:

resetting the storage controller subsequent to transferring data from the storage controller to the one or more NVM controllers; and

removing power from the storage controller subsequent to resetting the storage controller.

6. The method of claim 4 , wherein the one or more NVM controllers include a first NVM controller and a second NVM controller, and wherein removing power from the first plurality of controllers includes:

resetting the first NVM controller subsequent to transferring data from the first NVM controller to the non-volatile memory;

resetting the second NVM controller subsequent to transferring data from the second NVM controller to the non-volatile memory; and

removing power from the first and the second NVM controllers subsequent to resetting the first and second NVM controllers.

7. The method of claim 6 , wherein removing power from the first and the second NVM controllers is subsequent to removing power from the storage controller.

8. The method of claim 1 , wherein the soft power fail operation further includes, subsequent to removing power from the first plurality of controllers, restoring power to the first plurality of controllers.

9. The method of claim 1 , wherein the storage device includes a second section that is not part of the first section; and

wherein a second plurality of controllers on the storage device corresponding to the second section continue running independent of the soft power fail operation on the first section of the storage device.

10. The method of claim 1 , wherein removing power from the first plurality of controllers includes bringing an energy storage device to a discharged state.

11. The method of claim 10 , wherein the energy storage device is tested for quality.

12. The method of claim 1 , wherein the soft power fail operation further includes providing power to the first plurality of controllers on the storage device from an energy storage device distinct from a power source used during normal operation of the storage device.

13. The method of claim 1 , wherein the soft power fail operation further includes, prior to removing power from the first plurality of controllers, installing firmware on at least a subset of the first plurality of controllers on the storage device.

14. The method of claim 1 , further including:

in response to a second signal received by the storage device, performing a soft power fail operation on a second section of the storage device, distinct from the first section.

15. The method of claim 1 , wherein the soft power fail operation is controlled by a storage level microcontroller; and

wherein, during the soft power fail operation, the storage level microcontroller receives status information from components in the first section of the storage device.

16. The method of claim 1 , further including:

in response to a third signal received by the storage device, determining whether a power fail operation is in progress on the storage device; and

in accordance with a determination that the power fail operation is in progress, forgoing performance of a soft power fail operation in response to the third signal.

17. The method of claim 1 , wherein signaling the power fail condition to the first plurality of controllers on the storage device includes separately signaling the power fail condition to each controller in the first plurality of controllers.

18. The method of claim 1 , further comprising recording data regarding the soft power fail operation to non-volatile memory.

19. A storage device, comprising:

a first plurality of controllers, each of the first plurality of controllers configured to transfer data held in volatile memory to non-volatile memory; and

a data hardening module including an energy storage device, the data hardening module configured to:

receive or detect a first signal to simulate a power failure;

in response to receiving or detecting the first signal, perform a soft power fail operation on a first section of the storage device, the soft power fail operation including:

signaling a power fail condition to a second plurality of controllers on the storage device, wherein the second plurality of controllers correspond to the first section of the storage device and comprise some or all of the first plurality of controllers;

transferring data held in volatile memory to non-volatile memory; and

removing power from the first plurality of controllers.

20. The storage device of claim 19 , wherein the second plurality of controllers includes at least one non-volatile storage controller and at least one other storage controller.

21. The storage device of claim 19 , wherein the second plurality of controllers includes a storage controller and one or more non-volatile memory (NVM) controllers, the one or more NVM controllers coupled by the storage controller to a host interface of the storage device.

22. The storage device of claim 21 , wherein transferring data held in the volatile memory of the storage device to the non-volatile memory of the storage device includes:

transferring data from the storage controller to the one or more NVM controllers; and

transferring data from the one or more NVM controllers to the non-volatile memory.

23. A non-transitory computer readable storage medium, storing one or more programs for execution by one or more processors of a storage device having a plurality of controllers and a data hardening module, the one or more programs including instructions that when executed by the one or more processors of the storage device cause the storage device to:

receive or detect a first signal to simulate a power failure;

in response to receiving or detecting the first signal, perform a soft power fail operation on a first section of the storage device, the soft power fail operation including:

signaling a power fail condition to a first plurality of controllers on the storage device, wherein the first plurality of controllers correspond to the first section of the storage device;

transferring data held in volatile memory to non-volatile memory; and

removing power from the first plurality of controllers.

24. The non-transitory computer readable storage medium of claim 23 , wherein the non-transitory computer readable storage medium includes a non-transitory computer readable storage medium associated with each of the plurality of controllers on the storage device and a non-transitory computer readable storage medium associated with the data hardening module.

25. The non-transitory computer readable storage medium of claim 23 , wherein the first plurality of controllers includes at least one non-volatile storage controller and at least one other storage controller.

26. The non-transitory computer readable storage medium of claim 23 , wherein the first plurality of controllers includes a storage controller and one or more non-volatile memory (NVM) controllers, the one or more NVM controllers coupled by the storage controller to a host interface of the storage device.

27. The non-transitory computer readable storage medium of claim 23 , wherein transferring data held in the volatile memory of the storage device to the non-volatile memory of the storage device includes:

transferring data from the storage controller to the one or more NVM controllers; and

transferring data from the one or more NVM controllers to the non-volatile memory.

Assignments (10)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0486 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069169/0572 →
PATENT COLLATERAL AGREEMENT (DDTL) Recorded Feb 22, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 066648/0206 →
PATENT COLLATERAL AGREEMENT (AR) Recorded Feb 22, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 066648/0284 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2024
From: SANDISK TECHNOLOGIES LLC
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 066114/0298 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0948 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2016
From: SANDISK ENTERPRISE IP LLC
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038295/0225 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2014
From: LUCAS, GREGG S.; DELPAPA, KENNETH B.; ELLIS, ROBERT W.
To: SANDISK ENTERPRISE IP LLC
Reel/Frame 032575/0746 →
Continuity (2)
Provisional Application 61903895 · Nov 13, 2013
Related Publication 20150135008A1 · May 14, 2015