IP Library Granted Patent US 9,589,927
Granted Patent B2
US 9,589,927 · App. 14/496,477 · Granted Mar 7, 2017

Packaged RF amplifier devices with grounded isolation structures and methods of manufacture thereof

Inventors: Margaret A. Szymanowski (Chandler, AZ); Kimberly J. Foxx (Phoenix, AZ); Robert A. Pryor (Mesa, AZ)
Assignee: NXP USA, INC.
H01L24/85H01L23/66H03F1/0288H03F1/565H03F3/193H01L2224/49111H01L2224/73265H01L2924/13091H01L2924/181H03F2200/36H03F2200/451
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Quick Facts
Patent No.
US 9,589,927
App. No.
14/496,477
Granted
Mar 7, 2017
Kind
B2
Abstract

An embodiment of a packaged RF amplifier device includes a device substrate, a transistor die coupled to the device substrate, and an isolation structure coupled to the transistor die. The transistor die has a top die surface, a bottom die surface, a semiconductor substrate, first and second transistors formed in the semiconductor substrate, a conductive structure at the top die surface and positioned between the first and second transistors, and a low resistance path that extends vertically through the semiconductor substrate between the conductive structure and the bottom die surface. The isolation structure is coupled to the conductive structure and extends into an area above the top die surface between the first and second transistors. The isolation structure may be a wirebond fence, a conductive wall, conductive pillars or vias, or a plated trench that extends vertically upward from the conductive structure. The device may be encapsulated with molding compound.

Claims (50)

1. A packaged radio frequency (RF) amplifier device comprising:

a device substrate having a top substrate surface;

a transistor die, wherein the transistor die includes a top die surface, a bottom die surface coupled to the top substrate surface, a semiconductor substrate, first and second transistors formed in the semiconductor substrate, a conductive structure at the top die surface and positioned between the first and second transistors, and a low resistance path that extends vertically through the semiconductor substrate between the conductive structure and the bottom die surface, wherein the first transistor forms a portion of a first signal path through the device, and the second transistor forms a portion of a second signal path through the device; and

an isolation structure coupled to the conductive structure and extending into an area above the top die surface between the first and second transistors, wherein the isolation structure reduces inductive coupling between the first and second signal paths.

2. The packaged RF amplifier device of claim 1 , wherein the semiconductor substrate comprises:

a relatively low resistivity base substrate;

a relatively high resistivity epitaxial layer formed on the base substrate; and

a relatively low resistivity doped sinker region formed between top and bottom surfaces of the epitaxial layer, wherein the conductive structure is electrically coupled to the doped sinker region at the top surface of the epitaxial layer, wherein the base substrate and the doped sinker region form portions of the low resistance path.

3. The packaged RF amplifier device of claim 2 , wherein the transistor die further comprises:

a plurality of conductive layers formed over the semiconductor substrate, wherein the conductive structure is formed from a portion of a top conductive layer of the plurality of conductive layers, and wherein the conductive structure is electrically coupled to the doped sinker region.

4. The packaged RF amplifier device of claim 1 , wherein the semiconductor substrate comprises:

a plurality of conductive through substrate vias extending between top and bottom surfaces of the semiconductor substrate, wherein the conductive structure is electrically coupled to the plurality of through substrate vias, and the plurality of through substrate vias form a portion of the low resistance path.

5. The packaged RF amplifier device of claim 4 , wherein the transistor die further comprises:

a plurality of conductive layers formed over the semiconductor substrate, wherein the conductive structure is formed from a portion of a top conductive layer of the plurality of conductive layers, and wherein the conductive structure is electrically coupled to the plurality of through substrate vias at the top surface of the semiconductor substrate.

6. The packaged RF amplifier device of claim 1 , wherein the transistor die further comprises:

a plurality of conductive layers formed over the semiconductor substrate, and

wherein the conductive structure comprises a plurality of conductive bonding traces formed from portions of a top conductive layer of the plurality of conductive layers, wherein adjacent bonding traces are separated by a separation distance, and wherein the conductive structure is coupled to the semiconductor substrate through the plurality of conductive layers.

7. The packaged RF amplifier device of claim 1 , wherein the transistor die further comprises:

a plurality of conductive layers formed over the semiconductor substrate, wherein the conductive structure comprises at least one conductive bonding trace formed from a portion of a top conductive layer of the plurality of conductive layers;

a first dielectric layer underlying the top conductive layer and overlying a second conductive layer; and

at least one vertical conductive structure through the first dielectric layer and coupled between the top conductive layer and the second conductive layer.

8. The packaged RF amplifier device of claim 7 , wherein the at least one vertical conductive structure includes a conductive trench that extends through the first dielectric layer and electrically couples the conductive structure and the second conductive layer.

9. The packaged RF amplifier device of claim 7 , wherein the at least one vertical conductive structure includes a plurality of conductive vias that extend through the first dielectric layer and electrically couple the conductive structure and the second conductive layer.

10. The packaged RF amplifier device of claim 1 , wherein the isolation structure comprises a plurality of wirebonds, and wherein at least some of the plurality of wirebonds are coupled between the conductive structure and the device substrate.

11. A packaged radio frequency (RF) amplifier device comprising:

a device substrate having a top substrate surface;

a transistor die coupled to the top substrate surface, wherein the transistor die includes a top die surface, a bottom die surface, a semiconductor substrate, first and second transistors formed in the semiconductor substrate, a conductive structure at the top die surface and positioned between the first and second transistors, and a low resistance path that extends vertically through the semiconductor substrate between the conductive structure and the bottom die surface;

an isolation structure coupled to the conductive structure and extending into an area above the top die surface between the first and second transistors; and

a first isolation lead positioned at a first side of the device substrate, wherein the isolation structure comprises a plurality of wirebonds, and wherein at least some of the plurality of wirebonds are coupled between the conductive structure and the first isolation lead.

12. The packaged RF amplifier device of claim 11 , further comprising:

a second isolation lead positioned at a second side of the device substrate, wherein at least some of the plurality of wirebonds are coupled between the conductive structure and the second isolation lead;

first and second input leads coupled to the device substrate and positioned at the first side of the device substrate, wherein the first isolation lead is positioned between the first and second input leads; and

first and second output leads coupled to the device substrate and positioned at the second side of the device substrate, wherein the second isolation lead is positioned between the first and second output leads, and

wherein the first transistor is coupled between the first input lead and the first output lead, and the second transistor is coupled between the second input lead and the second output lead.

13. The packaged RF amplifier device of claim 1 , wherein the transistor die is coupled to the top substrate surface with a conductive bond selected from a solder bond, a eutectic bond, and a sintered bond.

14. The packaged RF amplifier device of claim 1 , further comprising:

non-conductive molding compound over the top substrate surface and encompassing the transistor die and the isolation structure.

15. A method of manufacturing a packaged radio frequency (RF) amplifier device, the method comprising the steps of:

coupling a bottom die surface of a transistor die to a top surface of a device substrate, wherein the transistor die includes a top die surface, the bottom die surface, a semiconductor substrate, first and second transistors formed in the semiconductor substrate, a conductive structure at the top die surface and positioned between the first and second transistors, and a low resistance path that extends vertically through the semiconductor substrate between the conductive structure and the bottom die surface, wherein the first transistor forms a portion of a first signal path through the device, and the second transistor forms a portion of a second signal path through the device; and

coupling an isolation structure to the conductive structure and extending into an area above the top die surface between the first and second transistors, wherein the isolation structure reduces inductive coupling between the first and second signal paths.

16. The method of claim 15 , wherein coupling the transistor die to the top surface of the device substrate comprises:

coupling the transistor die to the top substrate surface with a conductive bond selected from a solder bond, a eutectic bond, and a sintered bond.

17. The method of claim 15 , wherein coupling the isolation structure to the conductive structure comprises:

coupling a plurality of wirebonds to the isolation structure.

18. The method of claim 17 , further comprising:

coupling the plurality of wirebonds also to the top surface of the device substrate.

19. The method of claim 17 , further comprising:

coupling the plurality of wirebonds also to one or more isolation leads.

20. The method of claim 15 , further comprising:

disposing non-conductive molding compound over the top surface of the device substrate, wherein the non-conductive molding compound encompasses the transistor die and the isolation structure.

Assignments (17)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040626 FRAME: 0683. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Jan 12, 2017
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 041414/0883 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNMENT DOCUMENTATION - INITIAL CONVENYANCE LISTED CHANGE OF NAME. PREVIOUSLY RECORDED ON REEL 040579 FRAME 0827. ASSIGNOR(S) HEREBY CONFIRMS THE UPDATE CONVEYANCE TO MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Dec 15, 2016
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 040945/0252 →
CHANGE OF NAME Recorded Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
CHANGE OF NAME Recorded Nov 9, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040579/0827 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0502 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0460 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0921 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: SZYMANOWSKI, MARGARET A.; FOXX, KIMBERLY J.; PRYOR, ROBERT A.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 035330/0244 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Nov 4, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 034153/0027 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Nov 4, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 034160/0351 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Nov 4, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 034160/0370 →
Continuity (2)
Continuation In Part 14491574 · Sep 19, 2014
Related Publication 20160087588A1 · Mar 24, 2016