Fast-reading NAND flash memory
View Patent ↗In a flash memory two or more pages in a plane are read in rapid succession by maintaining global word line voltages throughout multiple page reads, and by simultaneously transitioning the old selected word line from a discrimination voltage to a read voltage and transitioning the new selected word line from the read voltage to a discrimination voltage.
1. A method of reading data from a NAND flash memory array comprising:
applying a plurality of word line voltages to word lines of a first block in order to read data along a word line of the first block; and
subsequently discharging the word lines of the first block while simultaneously charging word lines of a second block, the first and second blocks connected by common bit lines.
2. The method of claim 1 wherein the first block is connected to a first plurality of word line decoder and driver circuits through a first plurality of global word lines and the second block is connected to a second plurality of word line decoder and driver circuits through a second plurality of global word lines.
3. The method of claim 1 wherein the plurality of word line voltages are applied to the word lines of the first block through a plurality of block select transistors that connect the word lines of the first block to a plurality of global word lines; and
the word lines of the first block discharge trough a set of discharge transistors that connect the word lines of the first block to a common discharge node.
4. The method of claim 3 wherein word lines of the second block are charged through the plurality of global word lines, individual global word lines remaining charged throughout the discharging of the word lines of the first block and the charging of the word lines of the second block.
5. The method of claim 4 wherein a voltage is provided to global word lines by a charge pump, the charge pump remaining in operation throughout the reading of data along the word line of the first block, the subsequent discharging of word lines of the first block and simultaneous charging of word lines of the second block, and subsequent reading of data from the second block.
6. The method of claim 1 wherein the discharging the word lines of the first block while simultaneously charging word lines of the second block is in response to a command to perform high speed reading.