Chamfered corner crackstop for an integrated circuit chip
A corner crackstop is formed in each of the four corners of an integrated circuit (IC) chip, in which the corner crackstop differs structurally from a portion of the crackstop disposed along the sides of the IC chip. Each corner crackstop includes a plurality of layers, formed on a top surface of a silicon layer of the IC chip, within a perimeter boundary region that comprises a triangular area, in which a right angle is disposed on a bisector of the corner, equilateral sides of the triangle are parallel to sides of the IC chip, and the right angle is proximate to the corner relative to a hypotenuse of the triangle. The plurality of layers of the corner crackstop include crackstop elements, each comprising a metal cap centered over a via bar, in which the plurality of layers of the corner crackstop is chamfered to deflect crack ingress forces by each corner crackstop.
1. A corner crackstop comprising:
a plurality of n metallization layers formed on a silicon layer of an integrated circuit (IC) chip above a perimeter boundary region of a corner of said IC chip, said perimeter boundary region comprising a triangle, a right angle of said triangle being disposed on a bisector of said corner of said IC chip, equilateral sides of said triangle being parallel to sides of said IC chip, and a hypotenuse of said triangle being orthogonal to said bisector; and
a crackstop element disposed within each of said n metallization layers, each crackstop element being longitudinally oriented in parallel to said hypotenuse, being limited in length by said equilateral sides, and rising step-wise with each of said n metallization layers along said bisector from said right angle,
a crackstop element of a first layer being disposed proximately to said right angle and having a smallest length limited by said equilateral sides;
a crackstop element of a second layer being disposed more distally from said right angle than said crackstop element of said first layer, partially overlapping and contacting said crackstop element of said first layer, and having a greater length limited by said equilateral sides; and
a crackstop element of an nth layer being disposed yet more distally from said right angle along said bisector than said crackstop element of an (n−1)th layer, partially overlapping and contacting said crackstop element of said (n−1)th layer, and having a greatest length limited by said equilateral sides.
2. The corner crackstop of claim 1 , each crackstop element including a via bar and a metal cap, said via bar being formed in an intermetallic dielectric layer of each of said n metallization layers, being longitudinally oriented in parallel to said hypotenuse and having a width, w, measured along said bisector, and said metal cap being formed in a patterned metal layer of each of said n metallization layers, being longitudinally oriented in parallel to said hypotenuse, having a width greater than said width, w, of said via bar and being centered along said bisector over said via bar.
3. The corner crackstop of claim 2 , each successively higher crackstop element of each successively higher of said n metallization layers overlapping by a distance of less than ½ w along said bisector from a center of a lower crackstop element.
4. The corner crackstop of claim 3 , said metal cap and said via bar of each crackstop element, formed in each of said n metallization layers within said perimeter boundary region, not contacting an electrical device in an active region of said IC chip.
5. The corner crackstop of claim 1 , each corner crackstop element of said n metallization layers contacting a portion of another crackstop that is parallel to sides of said IC chip.
6. The corner crackstop of claim 1 , a plurality of corner crackstop elements corresponding to said plurality of said n metallization layers proximate to said corner region of said IC chip, forming a stepped chamfered outward-facing surface disposed between side surfaces and between a top surface and said silicon layer of said corner region of said IC chip.