Method and structure to reduce FET threshold voltage shift due to oxygen diffusion
Oxygen scavenging material embedded in an isolation structure provides improved protection of high dielectric constant (Hi-K) materials from oxygen contamination while avoiding alteration of work function and switching threshold shift in transistors including such Hi-K materials.
1. A method of forming an isolation structure in a semiconductor device, the method comprising:
forming a trench in a body of semiconductor material;
applying a liner layer of dielectric material in the trench;
after the liner layer is applied, isotropically depositing a first layer of oxygen scavenging material to a given depth within the trench;
selectively etching the first layer of oxygen scavenging material to reduce a thickness of the layer of oxygen scavenging material;
after the first layer of oxygen scavenging material is selectively etched, forming a first layer of dielectric material in the trench over the layer of oxygen scavenging material to encapsulate the first layer of the oxygen scavenging material in combination with the liner layer, and
isotropically depositing a second layer of oxygen scavenging material in the trench above the first layer of dielectric material.
2. The method of claim 1 wherein applying the liner layer of dielectric material in the trench comprises:
conformally depositing the dielectric material of the liner layer.
3. The method of claim 1 further comprising:
forming a second layer of dielectric material in the trench over the second layer of oxygen scavenging material to encapsulate the second layer of oxygen scavenging material in combination with the liner layer and the first layer of dielectric material.
4. The method of claim 1 further comprising:
annealing to cause migration of oxygen from first layer of dielectric material and the body of semiconductor material to the first layer of oxygen scavenging material.