IP Library Granted Patent US 9,570,440
Granted Patent B2
US 9,570,440 · App. 14/859,806 · Granted Feb 14, 2017

Semiconductor device and driver circuit with an active device and isolation structure interconnected through a diode circuit, and method of manufacture thereof

Inventors: Weize Chen (Phoenix, AZ); Hubert M. Bode (Haar, DE); Richard J. De Souza (Chandler, AZ); Patrice M. Parris (Phoenix, AZ)
Assignee: NXP USA, Inc.
H01L27/0727H01L21/761H01L29/66143H01L29/66681
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Quick Facts
Patent No.
US 9,570,440
App. No.
14/859,806
Granted
Feb 14, 2017
Kind
B2
Abstract

Embodiments of semiconductor devices and driver circuits include a semiconductor substrate having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within area of the substrate contained by the isolation structure, and a diode circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a body region of the second conductivity type, and the diode circuit is connected between the isolation structure and the body region. The diode circuit may include one or more Schottky diodes and/or PN junction diodes. In further embodiments, the diode circuit may include one or more resistive networks in series and/or parallel with the Schottky and/or PN diode(s).

Claims (31)

1. A method for forming a semiconductor device, the method comprising the steps of:

forming a buried layer below a top substrate surface of a semiconductor substrate having a first conductivity type, wherein the buried layer has a second conductivity type that is different from the first conductivity type;

forming a sinker region between the top substrate surface and the buried layer, wherein the sinker region has the second conductivity type, and an isolation structure is formed by the sinker region and the buried layer;

forming an active device in a portion of the semiconductor substrate contained by the isolation structure, wherein the active device includes a body region of the second conductivity type and a source region of the first conductivity type formed in the body region, and wherein the body region and the isolation structure are separated by a portion of the semiconductor substrate having the first conductivity type; and

forming a diode circuit between the isolation structure and the body region.

2. The method of claim 1 , wherein forming the diode circuit comprises:

forming a Schottky contact coupled with the isolation region.

3. The method of claim 2 , wherein forming the diode circuit further comprises:

connecting a resistive network in parallel with the Schottky diode.

4. The method of claim 2 , wherein forming the diode circuit further comprises:

connecting a resistive network in series with the Schottky diode.

5. The method of claim 4 , wherein forming the diode circuit further comprises:

connecting a resistive network in parallel with the Schottky diode.

6. The method of claim 2 , wherein forming the diode circuit further comprises:

forming a first further region of the first conductivity type extending into the sinker region and partially across the sinker region, wherein a first PN junction diode is formed between the first further region and the sinker region, and the first PN junction diode and the Schottky diode are in parallel between the body region and the isolation structure.

7. The method of claim 6 , wherein:

forming the first further region comprises forming the first further region to extend partially across the sinker region at an interior wall of the sinker region; and

forming the diode circuit further includes forming a second further region of the first conductivity type extending into the sinker region and partially across the sinker region at an exterior wall off the sinker region, wherein a portion of the sinker region is present at the top substrate surface between the first further region and the second further region, and wherein a second PN junction diode is formed between the second further region and the sinker region, and the second PN junction diode is in parallel with the Schottky diode and the first PN junction diode between the body region and the sinker region.

8. The method of claim 1 , wherein forming the diode circuit comprises:

forming a further region of the first conductivity type extending into the sinker region, wherein the diode circuit comprises a PN junction diode formed between the further region and the sinker region.

9. The method of claim 1 , wherein forming the diode circuit comprises:

forming and interconnecting a polycrystalline silicon diode between the body region and the sinker region.

10. The method of claim 1 , wherein:

forming the sinker region comprises forming the sinker region as a ring that substantially surrounds the active area; and

forming the diode circuit includes

forming a Schottky diode from a Schottky contact coupled with the isolation region, wherein the Schottky contact is positioned at a first portion of the ring,

forming one or more additional Schottky contacts positioned at portions of the ring that are spatially separated from the first portion and from each other, and

forming a plurality of further regions of the first conductivity type extending from the top substrate surface into the sinker region at a top surface of the sinker region, wherein the plurality of further regions are positioned at other portions of the ring that are interspersed between the Schottky contacts.

11. The method of claim 1 , wherein forming the active device further comprises:

forming a drift region of the first conductivity type within a central portion of the active area and extending from the top substrate surface into the semiconductor substrate; and

forming a drain region of the first conductivity type extending into the drift region from the top substrate surface.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040626 FRAME: 0683. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Jan 12, 2017
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 041414/0883 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNMENT DOCUMENTATION - INITIAL CONVENYANCE LISTED CHANGE OF NAME. PREVIOUSLY RECORDED ON REEL 040579 FRAME 0827. ASSIGNOR(S) HEREBY CONFIRMS THE UPDATE CONVEYANCE TO MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Dec 15, 2016
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 040945/0252 →
CHANGE OF NAME Recorded Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
CHANGE OF NAME Recorded Nov 9, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040579/0827 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
Continuity (3)
Division 13671503 · Nov 7, 2012
Continuation In Part 13538565 · Jun 29, 2012
Related Publication 20160013182A1 · Jan 14, 2016