IP Library Granted Patent US 9,659,926
Granted Patent B2
US 9,659,926 · App. 15/200,246 · Granted May 23, 2017

Semiconductor device

Inventors: Shinya Suzuki (Hokkaido, JP); Kiichi Makuta (Tokyo, JP)
Assignee: Renesas Electronics Corporation
H01L27/0292G02F1/13306G02F1/13452H01L23/49811H01L23/53214H01L24/10H01L24/13H01L24/14H01L27/0207H01L27/0248H01L23/5329H01L23/53209H01L23/53238H01L2224/13H01L2224/13099H01L2224/13644H01L2224/1412H01L2224/16H01L2924/01002H01L2924/0103H01L2924/01004H01L2924/0104H01L2924/01005H01L2924/01006H01L2924/01012H01L2924/01013H01L2924/01015H01L2924/01019H01L2924/01022H01L2924/01023H01L2924/01025H01L2924/01027H01L2924/01029H01L2924/01033H01L2924/01041H01L2924/01042H01L2924/01044H01L2924/01046H01L2924/01047H01L2924/01049H01L2924/01055H01L2924/01057H01L2924/01059H01L2924/01072H01L2924/01073H01L2924/01074H01L2924/01078H01L2924/01079H01L2924/01082H01L2924/04941H01L2924/14H01L2924/15788H01L2924/30105
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Quick Facts
Patent No.
US 9,659,926
App. No.
15/200,246
Granted
May 23, 2017
Kind
B2
Abstract

To provide a technique capable of reducing the chip size of a semiconductor chip and particularly, a technique capable of reducing the chip size of a semiconductor chip in the form of a rectangle that constitutes an LCD driver by devising a layout arrangement in a short-side direction. In a semiconductor chip that constitutes an LCD driver, input protection circuits are arranged in a lower layer of part of a plurality of input bump electrodes and on the other hand, in a lower layer of the other part of the input bump electrodes, the input protection circuits are not arranged but SRAMs (internal circuits) are arranged.

Claims (39)

1. A semiconductor device in the form of a rectangle having first and second short sides and first and second long sides, comprising:

a plurality of wiring layers formed over a semiconductor substrate;

first and second wirings formed at an uppermost layer of the wiring layers and extending along the first long side;

an insulating film formed over the first and second wirings;

first and second openings formed in the insulating film;

a first bump electrode formed over the first and second wirings, arranged nearer to the first long side than to the second long side and connected to the first wiring through the first opening; and

a second bump electrode formed over the first and second wirings, arranged nearer the first long side than to the second long side and connected to the second wiring through the second opening, wherein:

the first wiring is arranged between the second wiring and the first long side, and

a second distance between the second opening and the first long side is larger than a first distance between the first opening and the first long side.

2. The semiconductor device according to claim 1 ,

wherein the first wiring is different from the second wiring.

3. The semiconductor device according to claim 1 , wherein:

the first bump electrode is not connected to the second wiring, and

the second bump electrode is not connected to the first wiring.

4. The semiconductor device according to claim 1 , wherein:

the first and second wirings include an aluminum film; and

the first and second bump electrodes include a gold film.

5. The semiconductor device according to claim 1 , wherein:

the first wiring is a different from the second wiring,

the first bump electrode is not connected to the second wiring, and

the second bump electrode is not connected to the first wiring.

6. The semiconductor device according to claim 5 , wherein:

the first and second wirings include an aluminum film; and

the first and second bump electrodes include a gold film.

7. The semiconductor device according to claim 1 , further comprising:

a third wiring formed at said uppermost layer of the wiring layers and extending along the first long side, the insulating film also being formed over the third wiring;

a third opening formed in the insulating film;

a third bump electrode formed over the first, second and third wirings, arranged nearer to the first long side than to the second long side and connected to the third wiring through the third opening; wherein:

the second wiring is arranged between the third wiring and the first wiring, and

a third distance between the third opening and the first long side is larger than the second distance between the second opening and the first long side.

8. The semiconductor device according to claim 7 , wherein:

the first bump electrode is not connected to the second and third wirings;

the second bump electrode is not connected to the first and third wirings; and

the third bump electrode is not connected to the first and second wirings.

9. The semiconductor device according to claim 8 , wherein:

the first, second and third wirings extend parallel to one another as they pass under all three of the first, second and third bump electrodes, in a plan view of the device.

10. The semiconductor device according to claim 8 , wherein:

the first, second and third wirings do not overlap one another as they pass under all three of the first, second and third bump electrodes, in a plan view of the device.

11. A liquid crystal display having a driver comprising a semiconductor device in accordance with claim 1 .

Assignments (1)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
Priority Claims (1)
JP 2009-173356 · Jul 24, 2009 · national
Continuity (4)
Continuation 14712689 · May 14, 2015
Continuation 14028755 · Sep 17, 2013
Division 12793431 · Jun 3, 2010
Related Publication 20160315078A1 · Oct 27, 2016