Extrusion-resistant solder interconnect structures and methods of forming
Various embodiments include methods of forming interconnect structures, and the structures formed by such methods. In one embodiment, an interconnect structure can include: a photosensitive polyimide (PSPI) layer including a pedestal portion; a controlled collapse chip connection (C4) bump overlying the pedestal portion of the PSPI layer; a solder overlying the C4 bump and contacting a side of the C4 bump; and an underfill layer abutting the pedestal portion of the PSPI and the C4 bump, wherein the underfill layer and the solder form a first interface separated from the PSPI pedestal.
1. An interconnect structure comprising:
a photosensitive polyimide (PSPI) layer including a pedestal portion;
a controlled collapse chip connection (C4) bump overlying the pedestal portion of the PSPI layer, the C4 bump including:
a pad;
a ball limiting metallurgy (BLM) layer over the pad; and
a thick copper layer over the BLM layer;
a solder overlying the thick copper layer and directly contacting a side of the thick copper layer and a side of the BLM layer, wherein a gap is located between the solder and the pedestal portion; and
an underfill layer directly contacting the pedestal portion of the PSPI and the solder, wherein the underfill layer and the solder form a first interface separated from the pedestal portion, and wherein the underfill and the pedestal portion form a second interface, wherein the first interface and the second interface are separated by the gap.
2. The interconnect structure of claim 1 , wherein the solder is completely isolated from the PSPI layer.
3. The interconnect structure of claim 1 , wherein the underfill layer includes PSPI.
4. The interconnect structure of claim 1 , further comprising a nitride layer beneath the PSPI layer.
5. The interconnect structure of claim 4 , wherein the underfill directly contacts the nitride layer.
6. An interconnect structure comprising:
a photosensitive polyimide (PSPI) layer including a pedestal portion;
a controlled collapse chip connection (C4) bump overlying the pedestal portion of the PSPI layer, wherein the C4 bump includes:
a pad;
a ball limiting metallurgy (BLM) layer over the pad; and
a thick copper layer over the BLM layer;
a solder overlying the C4 bump and directly contacting a side of the C4 bump, wherein the solder is completely isolated from the PSPI layer, wherein a gap is located between the solder and the pedestal portion; and
an underfill layer abutting the pedestal portion of the PSPI and the C4 bump, wherein the underfill layer and the solder form a first interface separated from the pedestal portion, and wherein the underfill and the pedestal portion form a second interface, wherein the first interface and the second interface are separated by the gap.
7. The interconnect structure of claim 6 , wherein the solder overlies the thick copper layer and directly contacts a side of the thick copper layer, and wherein the solder directly contacts a side of the BLM layer.
8. The interconnect structure of claim 6 , wherein the underfill layer includes PSPI.
9. The interconnect structure of claim 6 , further comprising a nitride layer beneath the PSPI layer, wherein the underfill directly contacts the nitride layer.