IP Library Granted Patent US 11,152,211
Granted Patent B2
US 11,152,211 · App. 16/852,146 · Granted Oct 19, 2021

Semiconductor wafer thinning systems and related methods

Inventors: Michael J. Seddon (Gilbert, AZ); Thomas Neyer (Munich, DE)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L21/0475B24B37/20H01L21/67115
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Quick Facts
Patent No.
US 11,152,211
App. No.
16/852,146
Granted
Oct 19, 2021
Kind
B2
Abstract

Semiconductor substrate thinning systems and methods. Implementations of a method of thinning a semiconductor substrate may include: providing a semiconductor substrate having a first surface and a second surface opposing the first surface and inducing damage into a portion of the semiconductor substrate adjacent to the second surface forming a damage layer. The method may also include backgrinding the second surface of the semiconductor substrate.

Claims (30)

1. A method of thinning a semiconductor substrate comprising:

providing a semiconductor substrate;

using a laser, inducing damage into at least a portion of the semiconductor substrate adjacent to a surface of the semiconductor substrate forming a damage layer; and

backgrinding the surface of the semiconductor substrate;

wherein one of:

a lifetime of a backgrinding wheel is increased through the presence of the damage layer; or

a thinning rate is increased while a backgrinding wheel grinds the damage layer.

2. The method of claim 1 , further comprising one of:

after backgrinding the surface of the semiconductor substrate, using the laser to induce damage into a portion of the semiconductor substrate adjacent to the surface forming a second damage layer and backgrinding the surface of the semiconductor substrate to remove at least the second damage layer; or

after using the laser to induce damage into at least the portion of the semiconductor substrate, again using the laser to induce damage into at least the portion of the semiconductor substrate adjacent to the surface before backgrinding the surface of the semiconductor substrate.

3. The method of claim 1 , wherein using a laser to induce damage into at least the portion of the semiconductor substrate further comprises irradiating the surface with a laser beam at a focal point within the semiconductor substrate at a plurality of spaced apart locations along the surface to form the damage layer.

4. The method of claim 3 , wherein the method further comprises forming one or more cracks into the semiconductor substrate surrounding each of the plurality of spaced apart locations.

5. The method of claim 3 , wherein the semiconductor substrate is silicon carbide.

6. The method of claim 3 , wherein irradiating the surface with the laser beam at the focal point within the semiconductor substrate at the plurality of spaced apart locations further comprises irradiating the plurality of spaced apart locations using a predefined path.

7. The method of claim 6 , wherein the predefined path is one of an alternating single pass path, an intersecting single pass path, a spiral single pass path, an alternating dual pass path, a dual intersecting pass path, a spiral dual pass path, a random single pass path, a random dual pass path, a single pass path, a two or more pass path, an intersecting dual pass path, an overlapping single pass path, an overlapping dual pass path, or any combination thereof.

8. A method of preparing a semiconductor substrate for thinning, the method comprising:

providing a silicon carbide semiconductor substrate; and

using a plurality of ions, forming a damage layer in at least a portion of the silicon carbide semiconductor substrate adjacent to a surface of the silicon carbide semiconductor substrate, the damage layer configured to increase a thinning rate when a backgrinding wheel is grinding the damage layer.

9. The method of claim 8 , wherein the method further comprises forming one or more cracks into the semiconductor substrate.

10. The method of claim 8 , wherein using the plurality of ions to form the damage layer further comprises bombarding the surface with the plurality of ions from a plasma adjacent to the surface to form the damage layer.

11. The method of claim 8 , wherein using the plurality of ions to form the damage layer further comprises implanting the surface with the plurality of ions to form the damage layer.

12. A method of preparing a semiconductor substrate for thinning, the method comprising:

providing a silicon carbide semiconductor substrate; and

using a rapid temperature change, forming a damage layer in at least a portion of the silicon carbide semiconductor substrate adjacent to a surface of the silicon carbide semiconductor substrate, the damage layer configured to increase a thinning rate when a backgrinding wheel is grinding the damage layer.

13. The method of claim 12 , wherein the method further comprises forming one or more cracks into the semiconductor substrate.

14. The method of claim 12 , wherein using the rapid temperature change to form the damage layer in at least a portion of the semiconductor substrate further comprises locally rapidly cooling the surface to form the damage layer.

15. The method of claim 12 , wherein using the rapid temperature change to form the damage layer in at least a portion of the semiconductor substrate further comprises locally rapidly heating the surface to form the damage layer.

16. The method of claim 12 , wherein using the rapid temperature change to form the damage layer in at least a portion of the semiconductor substrate further comprises one of:

locally rapidly heating a first surface while locally rapidly cooling a second surface to form the damage layer; or

locally rapidly heating the second surface while locally rapidly cooling the first surface to form the damage layer.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 053613, FRAME 0621 Recorded Aug 17, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064618/0942 →
SECURITY INTEREST Recorded Jul 13, 2023
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; GTAT CORPORATION
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064271/0971 →
SECURITY INTEREST Recorded Aug 27, 2020
From: FAIRCHILD SEMICONDUCTOR CORPORATION; SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 053613/0621 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2020
From: SEDDON, MICHAEL J.; NEYER, THOMAS
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 052432/0736 →
Continuity (3)
Continuation 16448540 · Jun 21, 2019
Continuation 15958123 · Apr 20, 2018
Related Publication 20200243337A1 · Jul 30, 2020