IP Library Patent Application 18419013
Patent Application
App. No. 18/419,013

Multiple Function Nonvolatile Memory Express (NVMe) Device (MFND) Performance Improvement By Over Reading

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Quick Facts
Patent No.
US None
App. No.
18/419,013
Abstract

Instead of handling transaction layer packets (TLP) without over-read usage, utilize adaptive over-read. As TLPs are transferred from the host along the Peripheral Component Interconnect express (PCIe) in the fabric to the device, some performance options are best suited. The fabric prefers bytes read in multiples of 64 bytes, while the PCIe works best in smaller byte chunks. Adaptive over-read allows a device to periodically check a system through testing over-read usage to compare the results for best performance of the system. The system is checked periodically, because different devices in the system can have an effect on the fabric and PCIe that may change performance preferences.

Claims (37)

1 . A data storage device, comprising:

a memory device; and

a controller coupled to the memory device, wherein the controller is configured to:

receive a write command to write data to the memory device;

execute the write command, wherein executing the write command comprises reading more data from a host device than corresponds to the write command;

discard the more data; and

deliver data corresponding to the write command to the memory device.

2 . The data storage device of claim 1 , wherein an amount of data corresponding to the write command is less than an aligned data size.

3 . The data storage device of claim 2 , wherein the amount of data corresponding to the write command and the discarded more data collectively is equal to the aligned data size.

4 . The data storage device of claim 1 , wherein the controller is configured to determine whether to perform a simplified over read or an optimized over read.

5 . The data storage device of claim 4 , wherein the determining is performed by calculating whether (N−1)*O<R where N is a number of splits for non over reads, O is a number of overhead bytes per transaction layer packet (TLP), and R is a number of redundant bytes in the optimized over read.

6 . The data storage device of claim 5 , wherein the optimized over read is performed when R>(N−1)*O.

7 . The data storage device of claim 1 , wherein the controller is configured to perform an adaptive over read.

8 . The data storage device of claim 7 , wherein the adapted over read is a periodic measuring of latency for not over reading, simplified over reading, and optimized over reading.

9 . The data storage device of claim 1 , wherein the controller is configured to operate in a multiple function nonvolatile memory express (NVMe) device (MFND) environment.

10 . The data storage device of claim 9 , wherein at least one virtual host in the MFND environment has different requirements from at least one other virtual host.

11 . The data storage device of claim 10 , wherein the at least one virtual host uses a different over read than the at least one other virtual host.

12 . The data storage device of claim 1 , wherein the controller is further configured to detect an unsupported request notification from a host device, and wherein the controller is configured to continue to perform over reads.

13 . A data storage device, comprising:

a memory device; and

a controller coupled to the memory device, wherein the controller is configured to:

determine whether execution of a write command would be an aligned read transfer;

determine whether execution of the aligned read transfer is a non host memory buffer (HMB) and has an unsupported request (UR) bit; and

determine an age of a last measurement of a range of data for the aligned read transfer.

14 . The data storage device of claim 13 , wherein the controller is configured to over read data when determining that execution of the read command would result in a non-aligned transfer.

15 . The data storage device of claim 13 , wherein the range is per function.

16 . The data storage device of claim 13 , wherein the age is determined by comparing a time of a last measurement to a threshold.

17 . The data storage device of claim 13 , wherein the range is applicable to HMB, command fetching, data transfer, and physical region page (PRP).

18 . A data storage device, comprising:

means to store data; and

a controller coupled to the means to store data, wherein the controller is configured to:

operate in a multiple function nonvolatile memory express (NVMe) device (MFND) environment;

determine that a first function of the MEND operates without metadata;

determine that a second function of the MEND operates with aligned physical region page (PRPs); and

perform over read operations for one or more of the first function and the second function.

19 . The data storage device of claim 18 , wherein the controller is configured to return an unsupported request (UR) notification to a host device to a function of the MEND that only supports aligned reads and a read operation resulted in an over read.

20 . The data storage device of claim 19 , wherein the controller is configured to disable over read for functions of the MEND that receive a UR notification.

Assignments (9)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT (AR) Recorded May 15, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 067417/0329 →
PATENT COLLATERAL AGREEMENT (AR) Recorded Feb 22, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 066648/0284 →
PATENT COLLATERAL AGREEMENT (DDTL) Recorded Feb 22, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 066648/0206 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2024
From: SEGEV, AMIR; BENISTY, SHAY
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 066213/0302 →