IP Library Assignment 012410/0262
Patent Assignment
Reel/Frame 012410/0262

Assignment of Assignor's Interest

Recorded: 2001-12-19 Pages: 4
Assignors
MARTIN, ANDREW K.
Executed: 2001-12-19
KRISHNAMURTHY, NARAYANAN
Executed: 2001-12-19
Assignee
MOTOROLA, INC.
LAW DEPARTMENT, 1303 EAST ALGONGUIN ROAD, SCHAUMBURG, ILLINOIS, 60196
Covered Property (1)
Design Verification System for Avoiding False Failures and Method Therefor
Patent: 6,931,611 →
Application: 10/025,289 →
Publication: US 2003/0115562
Related Assignments (8)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest May 7, 2004
From: MOTOROLA, INC
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 015360/0718 →
Security Agreement Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
Reel/Frame 018855/0129 →
Security Agreement May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
Assignment of Assignor's Interest Oct 23, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: ZOZO MANAGEMENT, LLC
Reel/Frame 034038/0946 →
Assignment of Assignor's Interest Jan 7, 2015
From: ZOZO MANAGEMENT, LLC
To: APPLE INC.
Reel/Frame 034732/0019 →
Patent Release Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
Patent Release Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
Patent Release Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →