IP Library Assignment 018175/0852
Patent Assignment
Reel/Frame 018175/0852

Assignment of Assignor's Interest

Recorded: 2006-08-25 Pages: 7
Assignors
DING, MING H.
Executed: 2006-07-26
WIJESURIYA, SAJITHA
Executed: 2006-07-28
ZHAO, JUN
Executed: 2006-07-28
AGRAWAL, OM P.
Executed: 2006-08-02
BRITTON, BARRY
Executed: 2006-07-26
HE, XIAOJIE
Executed: 2006-07-28
Assignee
LATTICE SEMICONDUCTOR CORPORATION
5555 N.E. MOORE COURT, HILLSBORO, OREGON, 97124-6421
Covered Property (1)
Area Efficient Routing Architectures for Programmable Logic Devices
Patent: 7,605,606 →
Application: 11/498,646 →
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Interest Mar 18, 2015
From: LATTICE SEMICONDUCTOR CORPORATION; SIBEAM, INC.; SILICON IMAGE, INC.; DVDO, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 035223/0001 →
Security Interest May 21, 2019
From: LATTICE SEMICONDUCTOR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 049980/0786 →
Release of Security Interest May 21, 2019
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION; SILICON IMAGE, INC.; SIBEAM, INC.; DVDO, INC.
Reel/Frame 049827/0326 →