Patent Assignment
Reel/Frame 019910/0394
Security Agreement
Recorded: 2007-10-03
Received: 2007-10-03
Pages: 14
Assignor
VERTICAL CIRCUITS, INC.
Executed: 2007-09-05
Assignee
SILICON VALLEY BANK
3003 TASMAN DRIVE, SANTA CLARA, CA, 95054, UNITED STATES
Covered Properties
(14)
Stacked die vertical interconnect formed by transfer of interconnect material
Application:
60/965,184 →
Surface Passivation of Stackable Integrated Circuit Chips at Wafer Level
Application:
60/956,348 →
Three-Dimensional Circuitry Formed On Integrated Circuit Device Using Two-Dimensional Fabrication
Application:
60/945,274 →
Wafer Level Surface Passivation of Stackable Integrated Circuit Chips
Application:
60/945,005 →
Semiconductor Die Coating and Interconnection Fixture and Method
Application:
60/943,211 →
Assembly Having Stacked Die Mounted on Substrate
Application:
11/744,142 →
Die Assembly Having Electrical Interconnect
Application:
11/744,153 →
Under the Ear Headset
Application:
29/234,816 →
Over the Ear Headset
Application:
29/234,815 →
Micropede Stacked Die Component Assembly
Application:
11/097,829 →
Stacked Die Bga or Lga Component Assembly
Application:
11/090,969 →
Three Dimensional Six Surface Conformal Die Coating
Application:
11/016,558 →
Hearing Aid Circuit Reducing Feedback
Application:
10/931,683 →
Programmable Module
Application:
09/805,585 →