Stacked die BGA or LGA component assembly
View Patent ↗The present invention provides an apparatus for vertically interconnecting semiconductor die, integrated circuit die, or multiple die segments. Metal rerouting interconnects which extend to one or more sides of the die or segment can be optionally added to the die or multi die segment to provide edge bonding pads upon the surface of the die for external electrical connection points. After the metal rerouting interconnect has been added to the die on the wafer, the wafer is optionally thinned and each die or multiple die segment is singulated from the wafer by cutting or other appropriate singulation method. After the die or multiple die segments are singulated or cut from the wafer, insulation is applied to all surfaces of the die or multiple die segments, openings are made in the insulation above the desired electrical connection pads, and the die or multiple die segments are placed on top of one another to form a stack. Vertically adjacent segments in the stack are electrically interconnected by attaching a short flexible bond wire or bond ribbon to the exposed electrical connection pad at the peripheral edges of the die which protrudes horizontally from the die and applying electrically conductive polymer, or epoxy, filaments or lines to one or more sides of the stack.
1. A high density low parasitic stacked die BGA or LGA component assembly comprising:
a stack of semiconductor or integrated circuit dies mounted on a substrate and laminated to each other;
each die having a conformal, insulating coating having openings above specific connection locations at an edge of a top surface of the die as required by a specific component design;
the dies laminated on top of each other with an electrically insulating polymer or epoxy preform;
the stack being electrically connected vertically;
a vertical conductor comprised of a conductive polymer or conductive epoxy;
electrical connections including one or more metallic conducting elements bonded to pad locations on the surface of each die and extending, both physically and elctrically from the pad into the vertical conductor so that one end of the metallic conducting element is embedded within the conductive polymer;
the mounting and connection of the stack of semiconductor die on the substrate so that the vertical conductors are electrically and physically connected to electrical connection lands on the top surface of the substrate;
the mounting of the stack of semiconductor die to the substrate including an under-fill adhesive material between a lowest die in the stack and the top surface of the substrate;
the under-fill material extending past the edge of the bottom die and forming a fillet between the side of the die stack and the surface of the substrate;
the substrate having one or more conducting layers for connecting the die stack's vertical conductors to the top side of the substrate and to connection points such as solder balls on the bottom surface of the substrate.
2. The assembly as in claim 1 wherein the die have one or more metal rerouting layers to interconnect the original die connection pads with new connection locations at the edge of the top surface of the die.
3. The assembly as in claim 1 wherein the conformal, insulating coating is parylene.
4. The assembly as in claim 1 wherein the conformal, insulating coating is a polymer or plastic.
5. The assembly as in claim 1 wherein the openings in the conformal insulating coating have been formed by laser ablation.
6. The assembly as in claim 1 wherein the electrically insulating polymer or epoxy preform is thermally conductive.
7. The assembly as in claim 1 wherein the electrically insulating polymer preform includes solid spheres to maintain a fixed spacing and separation between the semiconductor die after lamination.
8. The assembly as in claim 1 wherein the semiconductor die are memory die.
9. The assembly as in claim 1 wherein the metallic conducting elements are formed by metal bonding wires or metal bonding ribbon.
10. The assembly as in claim 1 including means for connecting unique signals to one or more of the semiconductor layers in the die stack to program, select, route, or combine specific electrical signals to specific semiconductor die in the stack.
11. The assembly as in claim 9 , wherein the means for connecting unique signals is accomplished by selective removal and non removal of the conformal coating above the die connection pads.
12. The assembly as in claim 9 , wherein the means for connecting unique signals is accomplished by the presence or absence of the metallic conducting elements which connect the die connection pads to the vertical conductors.
13. The assembly as in claim 1 , wherein a conductive polymer or conductive epoxy is used to electrically connect the vertical conductors of the stacked die assembly to the electrical connection lands on the top surface of the substrate.
14. The assembly as in claim 1 , wherein the completed stack assembly is over-molded or encapsulated with a polymer, plastic, or epoxy, in addition to, or instead of the underfill coating, leaving the connections on the bottom of the substrate uncovered and exposed for electrical connection.