Patent Assignment
Reel/Frame 023292/0897
Assignment of Assignor's Interest
Recorded: 2009-09-29
Received: 2009-09-29
Pages: 4
Assignor
LSI CORPORATION
Executed: 2009-09-24
Assignee
TESSERA INTELLECTUAL PROPERTIES, INC.
3025 ORCHARD PARKWAY, SAN JOSE, CA, 95134, UNITED STATES
Covered Properties
(11)
Two Layer Substrate Ball Grid Array Design
Application:
11/205,364 →
Integrated Circuit Package and Method for a Pbga Package Having a Multiplicity of Staggered Power Ring Segments for Power Connection to Integrated Circuit Die
Application:
10/626,366 →
Designing a Ball Assignment for a Ball Grid Array Package
Application:
10/452,874 →
Integrated Circuit Packaging That Uses Guard Conductors to Isolate Noise-Sensitive Signals Within the Package Substrate
Application:
10/435,805 →
Pbga Electrical Noise Isolation of Signal Traces
Application:
10/387,261 →
Integrated Circuit Package Substrate with High Density Routing Mechanism
Application:
10/164,495 →
Integrated Circuit Package Substrate with High Density Routing Mechanism
Application:
10/105,863 →
Pbga Electrical Noise Isolation of Signal Traces
Application:
09/919,284 →
Tape Design to Reduce Warpage
Application:
09/894,718 →
Ball Assignment for Ball Grid Array Package
Application:
09/844,530 →
Layout of Vdd and Vss Balls in a Four Layer Pbga
Application:
09/781,866 →