IP Library Assignment 033332/0322
Patent Assignment
Reel/Frame 033332/0322

Assignment of Assignor's Interest

Recorded: 2014-07-17 Pages: 6
Assignors
RAJAPPAN, VENKATESAN
Executed: 2014-07-16
TANDYALA, MOHANA
Executed: 2014-07-16
XUE, HUA
Executed: 2014-07-16
Assignee
LATTICE SEMICONDUCTOR CORPORATION
55550 NE MOORE CT, C/O LEGAL DEPARTMENT, HILLSBORO, OREGON, 97124
Covered Property (1)
Mixed-Width Memory Techniques for Programmable Logic Devices
Patent: 9,576,093 →
Application: 14/320,169 →
Publication: US 2015/0379164
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Interest Mar 24, 2015
From: LATTICE SEMICONDUCTOR CORPORATION; SIBEAM, INC.; SILICON IMAGE, INC.; DVDO, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 035309/0142 →
Security Interest May 21, 2019
From: LATTICE SEMICONDUCTOR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 049980/0786 →
Release of Security Interest May 21, 2019
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION; SILICON IMAGE, INC.; SIBEAM, INC.; DVDO, INC.
Reel/Frame 049827/0326 →