Patent Assignment
Reel/Frame 035651/0708
MERGER AND CHANGE OF NAME
Recorded: 2015-05-13
Received: 2015-05-13
Pages: 11
Assignors
LLIU100 ACQUISITION CORP.
Executed: 2015-04-28
VITESSE SEMICONDUCTOR CORPORATION
Executed: 2015-04-28
Assignee
MICROSEMI COMMUNICATIONS, INC.
ONE ENTERPRISE, ALISO VIEJO, CA, 92656, UNITED STATES
Covered Applications
(71)
HIGH ACCURACY 1588 TIMESTAMPING OVER HIGH SPEED MULTI LANE DISTRIBUTION PHYSICAL CODE SUBLAYERS
App. No. 14/041,626
→
PACKET-BASED TIMING MEASUREMENT
App. No. 13/679,672
→
CONTINUOUSLY INTERLEAVED ERROR CORRECTION
App. No. 13/618,380
→
FREQUENCY AND PHASE ACQUISITION OF A CLOCK AND DATA RECOVERY CIRCUIT WITHOUT AN EXTERNAL REFERENCE CLOCK
App. No. 13/619,108
→
NETWORK DISTRIBUTED PACKET-BASED SYNCHRONIZATION
App. No. 13/470,197
→
TIMING SYNCHRONIZATION FOR NETWORKS WITH RADIO LINKS
App. No. 13/470,092
→
ADAPTIVE EQUALIZATION WITH GROUP DELAY
App. No. 13/071,935
→
DISTRIBUTED PACKET-BASED TIMESTAMP ENGINE
App. No. 13/039,199
→
METHOD FOR SWITCHING MASTER/SLAVE TIMING IN A 1000BASE-T LINK WITHOUT TRAFFIC DISRUPTION
App. No. 13/005,515
→
CLOCK AND DATA RECOVERY UNIT WITHOUT AN EXTERNAL REFERENCE CLOCK
App. No. 12/977,995
→
PACKET PROTOCOL PROCESSING WITH PRECISION TIMING PROTOCOL SUPPORT
App. No. 12/828,190
→
FRAMED FLOWS OVER PACKET-SWITCHED FABRICS
App. No. 12/763,972
→
MULTI-RATE SERIALIZER/DESERIALIZER CIRCUIT WITH BROAD OPERATING FREQUENCY RANGE
App. No. 12/687,419
→
CLOCK AND DATA RECOVERY FOR BURST-MODE SERIAL SIGNALS
App. No. 12/687,414
→
FREQUENCY AND PHASE ACQUISITION OF A CLOCK AND DATA RECOVERY CIRCUIT WITHOUT AN EXTERNAL REFERENCE CLOCK
App. No. 12/687,410
→
ADAPTIVE DATA RECOVERY SYSTEM WITH INPUT SIGNAL EQUALIZATION
App. No. 12/366,544
→
CONTINUOUSLY INTERLEAVED ERROR CORRECTION
App. No. 12/270,774
→
DIFFERENTIAL VOLTAGE MODE DRIVER AND DIGITAL IMPEDANCE CALIBERATION OF SAME
App. No. 12/239,418
→
FUSES FOR MEMORY REPAIR
App. No. 12/207,321
→
SYSTEM AND METHOD FOR SQUELCHING A RECOVERED CLOCK IN AN ETHERNET NETWORK
App. No. 12/029,230
→
METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED ADAPTIVE EQUALIZATION
App. No. 11/943,569
→
HIGH-SPEED DATA INTERFACE FOR CONNECTING NETWORK DEVICES
App. No. 11/555,168
→
MAINTAINING FILTERING DATABASE CONSISTENCY
App. No. 11/508,361
→
DIFFERENTIAL OPTO-ELECTRONICS TRANSMITTER
App. No. 11/330,497
→
CROSSPOINT SWITCH WITH SWITCH MATRIX MODULE
App. No. 11/231,320
→
DIGITAL AUTOMATIC POWER CONTROL LOOP FOR CONTINUOUS AND BURST MODE APPLICATIONS
App. No. 11/221,609
→
DATA DE-SKEW METHOD AND SYSTEM
App. No. 11/218,331
→
VARIABLE BANDWIDTH TRANSIMPEDANCE AMPLIFIER WITH ONE-WIRE INTERFACE
App. No. 11/060,061
→
ADAPTIVE EQUALIZATION WITH GROUP DELAY
App. No. 11/029,297
→
POWER AND AREA EFFICIENT ADAPTIVE EQUALIZATION
App. No. 10/872,108
→
INTEGRATED CIRCUIT IMPLEMENTATION FOR POWER AND AREA EFFICIENT ADAPTIVE EQUALIZATION
App. No. 10/872,307
→
METHOD AND APPARATUS FOR CONFIGURING THE OPERATION OF AN INTEGRATED CIRCUIT
App. No. 10/852,586
→
OPTICAL DISPERSION CORRECTION IN TRANSIMPEDANCE AMPLIFIERS
App. No. 10/841,948
→
METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED FEC ADAPTIVE EQUALIZATION
App. No. 10/810,271
→
SWITCHING MODE REGULATOR FOR SFP ETHERNET ADAPTOR
App. No. 10/754,250
→
DATA LOOP PORT ACCELERATION CIRCUIT
App. No. 10/724,957
→
METHOD OF OVERTONE SELECTION AND LEVEL CONTROL IN AN INTEGRATED CIRCUIT CMOS NEGATIVE RESISTANCE OSCILLATOR TO ACHIEVE LOW JITTER
App. No. 10/721,910
→
METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED ADAPTIVE EQUALIZATION
App. No. 10/677,123
→
MEANS AND A METHOD FOR SWITCHING DATA PACKETS OR FRAMES
App. No. 10/617,884
→
Packet forwarding method and system
App. No. 10/429,267
→
ON-CHIP CALIBRATED SOURCE TERMINATION FOR VOLTAGE MODE DRIVER AND METHOD OF CALIBRATION THEREOF
App. No. 10/411,993
→
SELF-ALIGNED BIPOLAR TRANSISTOR
App. No. 10/364,075
→
APPARATUS AND METHOD FOR INTER-CHIP OR CHIP-TO-SUBSTRATE CONNECTION WITH A SUB-CARRIER
App. No. 10/308,458
→
FAST LOCKING CLOCK AND DATA RECOVERY UNIT
App. No. 10/295,276
→
ADJUSTMENT OF A CLOCK DUTY CYCLE
App. No. 10/282,398
→
MULTIPLE ELEMENT CONTROLLED OPTICAL COUPLING
App. No. 10/222,341
→
DUAL-MIXER LOSS OF SIGNAL DETECTION CIRCUIT
App. No. 10/159,648
→
CONTROL TECHNIQUES AND DEVICES FOR AN OPTICAL SWITCH ARRAY
App. No. 10/150,531
→
PRECISE PHASE DETECTOR
App. No. 10/145,412
→
A SYSTEM AND A METHOD FOR MAINTAINING QUALITY OF SERVICE THROUGH A CONGESTED NETWORK
App. No. 10/139,338
→
DATA SWITCHING SYSTEM
App. No. 10/138,496
→
METHOD OF CONTROLLING THE TURN OFF CHARACTERISTICS OF A VCSEL DIODE
App. No. 10/096,739
→
TIME BASED PACKET SCHEDULING AND SORTING SYSTEM
App. No. 10/096,442
→
METHOD AND APPARATUS FOR SCHEDULING DATA ON A MEDIUM
App. No. 10/081,152
→
HIGH SPEED CROSS POINT SWITCH ROUTING CIRCUIT WITH WORD-SYNCHRONOUS SERIAL BACK PLANE
App. No. 10/074,106
→
RZ RECOVERY
App. No. 10/066,982
→
HIGH SPEED CROSS POINT SWITCH ROUTING CIRCUIT WITH WORD-SYNCHRONOUS SERIAL BACK PLANE
App. No. 10/047,166
→
SCALABLE CLOCK DISTRIBUTION FOR MULTIPLE CRU ON THE SAME CHIP
App. No. 10/041,888
→
AUTOMATIC LOAD BALANCING IN SWITCH FABRICS
App. No. 10/020,491
→
LOW-DENSITY PARITY CHECK FORWARD ERROR CORRECTION
App. No. 10/044,413
→
MONOLITHIC LOSS-OF-SIGNAL DETECT CIRCUITRY
App. No. 09/976,511
→
ACTUATOR-CONTROLLED MIRROR WITH Z-STOP MECHANISM
App. No. 09/956,609
→
PROGRAMMABLE ANALOG TAPPED DELAY LINE FILTER HAVING CASCADED DIFFERENTIAL DELAY CELLS
App. No. 09/955,563
→
METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED ADAPTIVE EQUALIZATION
App. No. 09/955,278
→
LIMITING AMPLIFIER MODULATOR DRIVER
App. No. 09/892,807
→
TRANSPARENT TRANSPORT OVERHEAD MAPPING
App. No. 09/882,582
→
CROSSPOINT SWITCH WITH SWITCH MATRIX MODULE
App. No. 09/878,054
→
PRODUCT CODE BASED FORWARD ERROR CORRECTION SYSTEM
App. No. 09/874,158
→
CLOCK BUFFER WITH DC OFFSET SUPPRESSION
App. No. 09/865,008
→
PAD CALIBRATION CIRCUIT WITH ON-CHIP RESISTOR
App. No. 09/850,530
→
APPARATUS AND METHOD FOR ANGLED COAXIAL TO PLANAR STRUCTURE BROADBAND TRANSITION
App. No. 09/837,615
→