IP Library › Assignment 037278/0670
Patent Assignment
Reel/Frame 037278/0670

Merger and Change of Name

Recorded: 2015-12-12 Pages: 11
Assignors
ORACLE USA, INC.
Executed: 2010-02-12
SUN MICROSYSTEMS, INC.
Executed: 2010-02-12
ORACLE AMERICA, INC.
Executed: 2010-02-12
Assignee
ORACLE AMERICA, INC.
500 ORACLE PARKWAY, REDWOOD SHORES, CALIFORNIA, 94065
Covered Properties (100)
Digital Encoding of Personal Signatures
Patent: 6,512,840 →
Application: 08/655,135 →
Techniques for Identifying and Manipulating Quoted or Reproduced Material Using a Quote Bar
Patent: 6,496,841 →
Application: 08/670,904 →
Opaque Screen Visualizer
Patent: 6,532,021 →
Application: 08/673,960 →
Method Frame Storage Using Multiple Memory Circuits
Patent: 6,532,531 →
Application: 08/787,617 →
System, Method and Article of Manufacture for Collaboration with an Application
Patent: 6,496,870 →
Application: 08/792,244 →
Interpreting Functions Utilizing a Hybrid of Virtual and Native Machine Instructions
Patent: 6,513,156 →
Application: 08/884,856 →
Publication: US 2002/0046298
Method and Apparatus for Generating a Graphical User Interface
Patent: 6,496,202 →
Application: 08/885,614 →
A System for Managing and Automatically Deleting Network Address Identified and Stored During a Network Communication Session When the Network Address Is Visited
Patent: 6,510,461 →
Application: 08/886,023 →
Management of User-Definable Databases
Patent: 6,513,047 →
Application: 08/923,717 →
Method and Apparatus for Efficient Representation of Variable Length Identifiers in a Distributed Object System
Patent: 6,516,354 →
Application: 08/993,204 →
Publication: US 2002/0029297
Method and Apparatus for Enforcing Locking Invariants in Multi-Threaded Systems
Patent: 6,510,460 →
Application: 08/993,206 →
Method, Apparatus & Computer Program Product for Invoking a Thread-Unaware Routine That Uses an Operation-Dependent Temporary Data Structure
Patent: 6,490,609 →
Application: 09/004,969 →
Translation-Lookaside Buffer with Current Tracking Reference Circuit
Patent: 6,493,790 →
Application: 09/016,207 →
Methods and Apparatus for Packaging a Program for Remote Execution
Patent: 6,493,870 →
Application: 09/044,900 →
System and Method Providing an Arrangement for Efficiently Emulating an Operating System Call
Patent: 6,530,017 →
Application: 09/062,908 →
Method and Apparatus for Providing a Network Interface
Patent: 6,529,518 →
Application: 09/096,450 →
Method for Determining the Desired Decoupling Components for Power Distribution Systems
Patent: 6,532,439 →
Application: 09/099,548 →
Publication: US 2001/0034587
Control of Multiple Computer Processes Using a Mutual Exclusion Primitive Ordering Mechanism
Patent: 6,499,048 →
Application: 09/107,972 →
Method and Apparatus for the Detection of Motion in Video
Patent: 6,493,041 →
Application: 09/108,066 →
Method and Apparatus for Longest Prefix Address Lookup
Patent: 6,526,055 →
Application: 09/175,552 →
System and Method for Facilitating Safepoint Synchronization in a Multithreaded Computer System
Patent: 6,523,059 →
Application: 09/206,810 →
Platform Independent Memory Image Analysis Architecture for Debugging a Computer Program
Patent: 6,490,695 →
Application: 09/234,843 →
Method and Apparatus for Limiting Security Attacks via Data Copied into Computer Memory
Patent: 6,519,702 →
Application: 09/235,880 →
System for Handling Load Errors Having Symbolic Entity Generator to Generate Symbolic Entity and Alu to Propagate the Symbolic Entity
Patent: 6,519,694 →
Application: 09/243,982 →
Publication: US 2001/0056530
Method and System for Providing Limited Access Privileges with an Untrusted Terminal
Patent: 6,510,523 →
Application: 09/253,550 →
Secure Communication with Mobile Hosts
Patent: 6,507,908 →
Application: 09/262,191 →
Method and Apparatus for Dynamically Configuring Device Using Device Code
Patent: 6,512,467 →
Application: 09/289,266 →
Switching Method in a Multi-Threaded Processor
Patent: 6,507,862 →
Application: 09/309,735 →
Computer System Including Multiple Clock Sources and Failover Switching
Patent: 6,516,422 →
Application: 09/320,794 →
Call Handling Mechanism
Patent: 6,504,913 →
Application: 09/326,629 →
Geometry Compression for Regular and Irregular Mesh Structures
Patent: 6,525,722 →
Application: 09/332,322 →
Parallel System and Method for Performing Fast Fourier Transform
Patent: 6,532,484 →
Application: 09/337,587 →
Apparatus and Method for Bad Address Handling
Patent: 6,526,485 →
Application: 09/368,008 →
Method and Apparatus for Extracting First Failure and Attendant Operating Information from Computer System Devices
Patent: 6,499,113 →
Application: 09/386,553 →
Method and Apparatus for Bus Parameter Optimization Using Probes of System Configurations
Patent: 6,502,212 →
Application: 09/386,564 →
A System for Updating a Set of Instantiated Content Providers Based on Changes in Content Provider Directory Without Interruption of a Network Information Services
Patent: 6,516,349 →
Application: 09/391,010 →
Method and Apparatus for Performing Multiplication/Addition Operations
Patent: 6,532,485 →
Application: 09/391,166 →
System and Computer-Implemented Method for Performing Multi-Stage Fast Walsh Transform
Patent: 6,505,224 →
Application: 09/408,463 →
Graphics System Having a Super-Sampled Sample Buffer with Generation of Output Pixels Using Selective Adjustment of Filtering for Implementation of Display Effects
Patent: 6,489,956 →
Application: 09/413,040 →
Graphics System Which Renders Samples into a Sample Buffer and Generates Pixels in Response to Stored Samples at Different Rates
Patent: 6,525,723 →
Application: 09/413,103 →
Graphics System Having a Super-Sampled Sample Buffer with Generation of Output Pixels Using Selective Adjustment of Filtering for Reduced Artifacts
Patent: 6,496,186 →
Application: 09/413,104 →
Mechanism to Improve Fault Isolation and Diagnosis in Computers
Patent: 6,519,717 →
Application: 09/413,108 →
Mounting Media Drives in a Computer System
Patent: 6,525,930 →
Application: 09/415,759 →
Disk Drive Isolation Mount
Patent: 6,498,722 →
Application: 09/426,220 →
System and Method for Generating Code for Query Object Interfacing
Patent: 6,496,833 →
Application: 09/431,645 →
Reducing Network Traffic for Remote File System Accesses by Keeping Track of Unallocated Regions in Files
Patent: 6,516,344 →
Application: 09/436,050 →
Graphics System Configured to Perform Parallel Sample to Pixel Calculation
Patent: 6,496,187 →
Application: 09/472,940 →
Method and Apparatus for Powering Up an Electronic System After Ac Power Has Been Removed
Patent: 6,504,266 →
Application: 09/484,093 →
Automated Shielding Algorithm for Dynamic Circuits
Patent: 6,510,545 →
Application: 09/488,915 →
Method to Reduce Memory Latencies by Performing Two Levels of Speculation
Patent: 6,496,917 →
Application: 09/499,264 →
Incremental Class Unloading in a Train-Algorithm-Based Garbage Collector
Patent: 6,529,919 →
Application: 09/504,091 →
Method and Apparatus for Generating an Audio Signature for a Data Item
Patent: 6,532,477 →
Application: 09/511,539 →
Method and Apparatus for Post-Mortem Kernel Memory Leak Detection
Patent: 6,523,141 →
Application: 09/512,843 →
Hierarchical Coupling Noise Analysis for Submicron Integrated Circuit Designs
Patent: 6,507,935 →
Application: 09/513,161 →
Disk Scheduling System with Bounded Request Reordering
Patent: 6,496,899 →
Application: 09/514,485 →
Extending the Capabilities of an Xsl Style Sheet to Include Components for Content Transformation
Patent: 6,507,857 →
Application: 09/523,378 →
Morphing Decompression in a Graphics System
Patent: 6,525,725 →
Application: 09/525,581 →
Method and Apparatus for Optimizing Testing Sequences for Electronic Equipment
Patent: 6,502,051 →
Application: 09/526,677 →
System and Method for Testing Signal Interconnections Using Built-in Self Test
Patent: 6,505,317 →
Application: 09/534,839 →
Apparatus and Method for Source Synchronous Link Testing of an Integrated Circuit
Patent: 6,507,934 →
Application: 09/551,687 →
File Portability Techniques
Patent: 6,526,570 →
Application: 09/558,408 →
Spatial and Temporal Alignment of a Scan Dump for Debug of Scan-Based Designs
Patent: 6,507,925 →
Application: 09/574,710 →
Computer Aided Design Flow to Locate Grounded Fill in a Large Scale Integrated Circuit
Patent: 6,499,135 →
Application: 09/579,109 →
Latch Mapper
Patent: 6,496,955 →
Application: 09/595,150 →
Protective Device for Installing Cpci Microprocessor Boards
Patent: 6,504,728 →
Application: 09/607,427 →
Method for Scalable Memory Efficient Thread-Local Object Allocation
Patent: 6,505,275 →
Application: 09/624,173 →
Method and Apparatus for Undirectional Coolant Flow Control Unit for Pressurized Cooling Systems
Patent: 6,502,628 →
Application: 09/639,959 →
Apparatus and Method for Selectably Including a Mass Storage Device in a Selectable Space of a Computer System
Patent: 6,490,152 →
Application: 09/654,758 →
Hierarchical Parasitic Capacitance Extraction for Ultra Large Scale Integrated Circuits
Patent: 6,526,549 →
Application: 09/662,387 →
Method and Apparatus for Reducing Power Consumption
Patent: 6,528,974 →
Application: 09/669,357 →
Efficient Object Faulting with Generational Garbage Collection
Patent: 6,493,730 →
Application: 09/686,164 →
Long Line Receiver for Cmos Integrated Circuits
Patent: 6,526,552 →
Application: 09/696,451 →
Striding-Type Generation Scanning for Parallel Garbage Collection
Patent: 6,526,422 →
Application: 09/702,485 →
Dual Voltage Sense Cell for Input/Output Dynamic Termination Logic
Patent: 6,504,486 →
Application: 09/707,191 →
Adding Electrical Resistance in Series with Bypass Capacitors to Achieve a Desired Value of Electrical Impedance Between Conductors of an Electrical Power Distribution Structure
Patent: 6,525,622 →
Application: 09/715,723 →
High Density Packaging for Multi-Disk Systems
Patent: 6,510,050 →
Application: 09/718,866 →
Tile Array Computers
Patent: 6,496,359 →
Application: 09/733,241 →
Publication: US 2002/0071247
Geometry Instructions for Graphics Data Compression
Patent: 6,532,012 →
Application: 09/812,477 →
Publication: US 2002/0050992
Methodology to Create Integrated Circuit Designs by Replication Maintaining Isomorphic Input Output and Fault Behavior
Patent: 6,516,449 →
Application: 09/824,495 →
Publication: US 2002/0174404
Stretching, Shortening, and/or Removing a Clock Cycle
Patent: 6,529,057 →
Application: 09/834,137 →
Publication: US 2002/0149411
Method and Apparatus for Defining Signal Timing for an Integrated Circuit Device
Patent: 6,519,747 →
Application: 09/837,923 →
Publication: US 2002/0157072
Modular Computer System Mechanical Interconnection
Patent: 6,493,230 →
Application: 09/846,984 →
Publication: US 2002/0163788
Minimizing the Effect of Clock Skew in Bit Line Write Driver
Patent: 6,498,516 →
Application: 09/855,353 →
Publication: US 2002/0171463
Method for Coupling Logic Blocks Using Low Threshold Pass Transistors
Patent: 6,489,804 →
Application: 09/872,786 →
Overdriven Pass Transistors
Patent: 6,501,295 →
Application: 09/872,840 →
Signal Buffers for Printed Circuit Boards
Patent: 6,515,501 →
Application: 09/873,093 →
Publication: US 2002/0180517
Method and Circuitry for a Pre-Emphasis Scheme for Single-Ended Center Taped Terminated High Speed Digital Signaling
Patent: 6,518,792 →
Application: 09/879,501 →
Publication: US 2002/0186056
Method for Smoothing Di/Dt Noise Due to Clock Transitions
Patent: 6,515,527 →
Application: 09/887,395 →
Publication: US 2002/0196075
Reliable Card Detection in a Cpci System
Patent: 6,501,660 →
Application: 09/887,807 →
Publication: US 2002/0196611
Memory Read Circuitry
Patent: 6,512,712 →
Application: 09/908,667 →
Publication: US 2003/0016579
Clocked Half-Rail Differential Logic
Patent: 6,496,039 →
Application: 09/927,751 →
Method for Reducing Peak to Peak Jitter in a Dual-Loop Delay Locked Loop
Patent: 6,501,328 →
Application: 09/930,435 →
Method of Coupling Semiconductor Devices Including Multi-Chip Semiconductor Devices
Patent: 6,495,396 →
Application: 09/942,356 →
Hinged Bezel for a Computer System
Patent: 6,519,140 →
Application: 09/951,992 →
Data Strobe Receiver
Patent: 6,512,704 →
Application: 09/952,951 →
Minimizing the Effect of Clock Skew in Precharge Circuit
Patent: 6,498,520 →
Application: 09/973,326 →
Single-Input/Dual-Output Sense Amplifier
Patent: 6,501,302 →
Application: 09/977,770 →
Selectable Resistor and/or Driver for an Integrated Circuit with a Linear Resistance
Patent: 6,509,765 →
Application: 09/990,729 →
Method of Coding Frequently Occurring Values
Patent: 6,522,270 →
Application: 10/025,617 →
Method for Assigning Power and Ground Pins in Array Packages to Enhance Next Level Routing
Patent: 6,521,846 →
Application: 10/041,019 →
Related Assignments (25)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest May 30, 1996
From: TOGNAZZINI, BRUCE
To: SUN MICROSYSTEMS, INC.
Reel/Frame 008024/0928 →
Assignment of Assignor's Interest Jun 26, 1996
From: TOGNAZZINI, BRUCE
To: SUN MICROSYSTEMS, INC.
Reel/Frame 008064/0226 →
Assignment of Assignor's Interest Sep 23, 1996
From: TOGNAZZINI, BRUCE; NIELSEN, JAKOB
To: SUN MICROSYSTEMS, INC.
Reel/Frame 008150/0775 →
Assignment of Assignor's Interest Jan 23, 1997
From: O'CONNOR, JAMES MICHAEL; TREMBLAY, MARC
To: SUN MICROSYSTEMS, INC.
Reel/Frame 008402/0329 →
Assignment of Assignor's Interest Jan 31, 1997
From: FAUSTINI, ANTONY AZIO
To: SUN MICROSYSTEMS, INC.
Reel/Frame 008433/0802 →
Assignment of Assignor's Interest Jun 30, 1997
From: BAK, LARS; GRIESEMER, ROBERT
To: SUN MICROSYSTEMS, INC.
Reel/Frame 008672/0497 →
Assignment of Assignor's Interest Dec 15, 1997
From: BAK, LARS; GRIESEMER, ROBERT
To: SUN MICROSYSTEMS, INC.
Reel/Frame 008865/0656 →
Assignment of Assignor's Interest Jan 9, 1998
From: O'CONNOR, MICHAEL D.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 008950/0995 →
Assignment of Assignor's Interest Jan 9, 1998
From: FURLANI, JOHN L.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 008950/0985 →
Assignment of Assignor's Interest Jan 15, 1998
From: NIELSEN, JAKOB
To: SUN MICROSYSTEMS, INC.
Reel/Frame 008926/0693 →
Assignment of Assignor's Interest Feb 3, 1998
From: TALLEY, STEPHEN C.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 008986/0037 →
Assignment of Assignor's Interest May 5, 1998
From: PRINZING, TIMOTHY
To: SUN MICROSYSTEMS, INC.
Reel/Frame 009213/0178 →
Assignment of Assignor's Interest May 18, 1998
From: CALLSEN, CHRISTIAN J.; CAVANAUGH, KEN M.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 009188/0587 →
Assignment of Assignor's Interest May 18, 1998
From: CAVANAUGH, KEN M.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 009188/0576 →
Assignment of Assignor's Interest Jun 15, 1998
From: KHIEU, CONG QUOC; LIU, XIN; CHU, DER-REN; LEE, LAN
To: SUN MICROSYSTEMS, INC.
Reel/Frame 009251/0492 →
Assignment of Assignor's Interest Jul 7, 1998
From: MADANY, PETER W.; TUCK, RICHARD; FRESKO, NEDIM; GAJEWSKA, HANIA
To: SUN MICROSYSTEMS, INC.
Reel/Frame 009319/0611 →
Assignment of Assignor's Interest Oct 23, 1998
From: WILLIAMS, EMRYS JOHN; SUN MICROSYSTEMS LIMITED
To: SUN MICROSYSTEMS, INC.
Reel/Frame 009531/0514 →
Assignment of Assignor's Interest Nov 10, 1998
From: PERLMAN, RADIA; CHIU, DAH MING
To: SUN MICROSYSTEMS, INC.
Reel/Frame 009576/0379 →
Assignment of Assignor's Interest Dec 7, 1998
From: SCHMIDT, RENE W.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 009655/0347 →
Assignment of Assignor's Interest Dec 11, 1998
From: HANKO, JAMES G.; NORTHCUTT, J. DUANE; WALL, GERARD A.; BUTCHER, LAWRENCE L.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 009640/0501 →
Assignment of Assignor's Interest Mar 1, 1999
From: WEBBER, THOMAS P
To: SUN MICROSYSTEMS, INC.
Reel/Frame 009794/0523 →
Assignment of Assignor's Interest Mar 28, 2000
From: ANDERSON, RAYMOND F.; SMITH, LARRY D.; ROY, TANMOY
To: SUN MICROSYSTEMS, INC.
Reel/Frame 010709/0636 →
Assignment of Assignor's Interest Jun 27, 2000
From: DAC TA, PETER CUONG
To: SUN MICROSYSTEMS, INC.
Reel/Frame 010902/0792 →
Assignment of Assignor's Interest Mar 2, 2001
From: DICE, DAVID; SREENIVASAN, SUNIL; AHO, DAVID
To: SUN MICROSYSTEMS, INC.
Reel/Frame 011365/0636 →
Assignment of Assignor's Interest Jun 22, 2001
From: HO, RAYMOND K.; JOCHIONG, VICTOR E.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 011938/0693 →