Patent Assignment
Reel/Frame 042523/0577
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded: 2017-05-22
Received: 2017-05-22
Pages: 14
Assignor
MICROSEMI COMMUNICATIONS, INC.
Executed: 2016-09-29
Assignee
MICROSEMI STORAGE SOLUTIONS, INC.
ONE ENTERPRISE, ALISO VIEJO, CA, 92656, UNITED STATES
Covered Applications
(71)
PTP TRANSPARENT CLOCK SYSTEM UPGRADE SOLUTION
App. No. 15/224,705
→
ASYMMETRIC CROSS-CONNECT SYSTEM
App. No. 62/323,835
→
RECEIVER FOR A PET COLLAR
App. No. 29/557,723
→
TIMESTAMP PREDICTOR FOR PACKETS OVER A SYNCHRONOUS PROTOCOL
App. No. 14/721,920
→
CONTINUOUSLY INTERLEAVED ERROR CORRECTION
App. No. 14/526,148
→
NETWORK DISTRIBUTED PACKET-BASED SYNCHRONIZATION
App. No. 14/503,082
→
PTP TRANSPARENT CLOCK SYSTEM UPGRADE SOLUTION
App. No. 14/502,877
→
TIMING SYNCHRONIZATION FOR NETWORKS WITH RADIO LINKS
App. No. 14/160,449
→
PARALLEL CRC COMPUTATION WITH DATA ENABLES
App. No. 14/135,437
→
HIGH ACCURACY 1588 TIMESTAMPING OVER HIGH SPEED MULTI LANE DISTRIBUTION PHYSICAL CODE SUBLAYERS
App. No. 14/041,626
→
DELAY MEASUREMENT IN A POINT TO MULTIPOINT SYSTEM
App. No. 14/040,320
→
RECIRCULATING BALL SCREW ASSEMBLY
App. No. 13/790,078
→
PACKET-BASED TIMING MEASUREMENT
App. No. 13/679,672
→
PHYSICAL LAYER PROCESSING OF TIMESTAMPS AND MAC SECURITY
App. No. 13/671,480
→
WAN TRANSPORT OF FRAMES WITH MAC SECURITY
App. No. 13/671,516
→
CONTINUOUSLY INTERLEAVED ERROR CORRECTION
App. No. 13/618,380
→
FREQUENCY AND PHASE ACQUISITION OF A CLOCK AND DATA RECOVERY CIRCUIT WITHOUT AN EXTERNAL REFERENCE CLOCK
App. No. 13/619,108
→
NETWORK DISTRIBUTED PACKET-BASED SYNCHRONIZATION
App. No. 13/470,197
→
TIMING SYNCHRONIZATION FOR NETWORKS WITH RADIO LINKS
App. No. 13/470,092
→
ADAPTIVE EQUALIZATION WITH GROUP DELAY
App. No. 13/071,935
→
DISTRIBUTED PACKET-BASED TIMESTAMP ENGINE
App. No. 13/039,199
→
METHOD FOR SWITCHING MASTER/SLAVE TIMING IN A 1000BASE-T LINK WITHOUT TRAFFIC DISRUPTION
App. No. 13/005,515
→
CLOCK AND DATA RECOVERY UNIT WITHOUT AN EXTERNAL REFERENCE CLOCK
App. No. 12/977,995
→
TIMESTAMP PREDICTOR FOR PACKETS OVER A SYNCHRONOUS PROTOCOL
App. No. 12/895,467
→
PACKET PROTOCOL PROCESSING WITH PRECISION TIMING PROTOCOL SUPPORT
App. No. 12/828,190
→
FRAMED FLOWS OVER PACKET-SWITCHED FABRICS
App. No. 12/763,972
→
MULTI-RATE SERIALIZER/DESERIALIZER CIRCUIT WITH BROAD OPERATING FREQUENCY RANGE
App. No. 12/687,419
→
CLOCK AND DATA RECOVERY FOR BURST-MODE SERIAL SIGNALS
App. No. 12/687,414
→
FREQUENCY AND PHASE ACQUISITION OF A CLOCK AND DATA RECOVERY CIRCUIT WITHOUT AN EXTERNAL REFERENCE CLOCK
App. No. 12/687,410
→
ADAPTIVE DATA RECOVERY SYSTEM WITH INPUT SIGNAL EQUALIZATION
App. No. 12/366,544
→
CONTINUOUSLY INTERLEAVED ERROR CORRECTION
App. No. 12/270,774
→
DIFFERENTIAL VOLTAGE MODE DRIVER AND DIGITAL IMPEDANCE CALIBERATION OF SAME
App. No. 12/239,418
→
FUSES FOR MEMORY REPAIR
App. No. 12/207,321
→
SYSTEM AND METHOD FOR SQUELCHING A RECOVERED CLOCK IN AN ETHERNET NETWORK
App. No. 12/029,230
→
METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED ADAPTIVE EQUALIZATION
App. No. 11/943,569
→
ANODES
App. No. 29/273,067
→
HIGH-SPEED DATA INTERFACE FOR CONNECTING NETWORK DEVICES
App. No. 11/555,168
→
MAINTAINING FILTERING DATABASE CONSISTENCY
App. No. 11/508,361
→
DIFFERENTIAL OPTO-ELECTRONICS TRANSMITTER
App. No. 11/330,497
→
CROSSPOINT SWITCH WITH SWITCH MATRIX MODULE
App. No. 11/231,320
→
VARIABLE BANDWIDTH TRANSIMPEDANCE AMPLIFIER WITH ONE-WIRE INTERFACE
App. No. 11/060,061
→
ADAPTIVE EQUALIZATION WITH GROUP DELAY
App. No. 11/029,297
→
POWER AND AREA EFFICIENT ADAPTIVE EQUALIZATION
App. No. 10/872,108
→
INTEGRATED CIRCUIT IMPLEMENTATION FOR POWER AND AREA EFFICIENT ADAPTIVE EQUALIZATION
App. No. 10/872,307
→
METHOD AND APPARATUS FOR CONFIGURING THE OPERATION OF AN INTEGRATED CIRCUIT
App. No. 10/852,586
→
OPTICAL DISPERSION CORRECTION IN TRANSIMPEDANCE AMPLIFIERS
App. No. 10/841,948
→
METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED FEC ADAPTIVE EQUALIZATION
App. No. 10/810,271
→
SWITCHING MODE REGULATOR FOR SFP ETHERNET ADAPTOR
App. No. 10/754,250
→
METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED ADAPTIVE EQUALIZATION
App. No. 10/677,123
→
MEANS AND A METHOD FOR SWITCHING DATA PACKETS OR FRAMES
App. No. 10/617,884
→
Packet forwarding method and system
App. No. 10/429,267
→
ON-CHIP CALIBRATED SOURCE TERMINATION FOR VOLTAGE MODE DRIVER AND METHOD OF CALIBRATION THEREOF
App. No. 10/411,993
→
APPARATUS AND METHOD FOR INTER-CHIP OR CHIP-TO-SUBSTRATE CONNECTION WITH A SUB-CARRIER
App. No. 10/308,458
→
FAST LOCKING CLOCK AND DATA RECOVERY UNIT
App. No. 10/295,276
→
DUAL-MIXER LOSS OF SIGNAL DETECTION CIRCUIT
App. No. 10/159,648
→
A SYSTEM AND A METHOD FOR MAINTAINING QUALITY OF SERVICE THROUGH A CONGESTED NETWORK
App. No. 10/139,338
→
DATA SWITCHING SYSTEM
App. No. 10/138,496
→
METHOD OF CONTROLLING THE TURN OFF CHARACTERISTICS OF A VCSEL DIODE
App. No. 10/096,739
→
TIME BASED PACKET SCHEDULING AND SORTING SYSTEM
App. No. 10/096,442
→
METHOD AND APPARATUS FOR SCHEDULING DATA ON A MEDIUM
App. No. 10/081,152
→
RZ RECOVERY
App. No. 10/066,982
→
HIGH SPEED CROSS POINT SWITCH ROUTING CIRCUIT WITH WORD-SYNCHRONOUS SERIAL BACK PLANE
App. No. 10/047,166
→
SCALABLE CLOCK DISTRIBUTION FOR MULTIPLE CRU ON THE SAME CHIP
App. No. 10/041,888
→
AUTOMATIC LOAD BALANCING IN SWITCH FABRICS
App. No. 10/020,491
→
MONOLITHIC LOSS-OF-SIGNAL DETECT CIRCUITRY
App. No. 09/976,511
→
PROGRAMMABLE ANALOG TAPPED DELAY LINE FILTER HAVING CASCADED DIFFERENTIAL DELAY CELLS
App. No. 09/955,563
→
METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED ADAPTIVE EQUALIZATION
App. No. 09/955,278
→
LIMITING AMPLIFIER MODULATOR DRIVER
App. No. 09/892,807
→
CROSSPOINT SWITCH WITH SWITCH MATRIX MODULE
App. No. 09/878,054
→
CLOCK BUFFER WITH DC OFFSET SUPPRESSION
App. No. 09/865,008
→
PAD CALIBRATION CIRCUIT WITH ON-CHIP RESISTOR
App. No. 09/850,530
→