Patent Assignment
Reel/Frame 043669/0832
Security Interest
Recorded: 2017-09-22
Pages: 5
Assignor
ESILICON CORPORATION
Executed: 2017-09-05
Assignee
SILICON VALLEY BANK
3003 TASMAN DRIVE, SANTA CLARA, CALIFORNIA, 95054
Covered Properties
(33)
Apparatus and Method for Self-Synchronization of Data to a Local Clock
Patent:
6,604,203 →
Application:
09/394,376 →
Multicasting Method and Arrangement
Patent:
6,625,151 →
Application:
09/420,909 →
Queue Management System Performing One Read One Write During One Cycle by Using Free Queues
Patent:
6,754,742 →
Application:
09/428,285 →
Apparatus and Method for Converting Data in Serial Format to Parallel Format and Vice Versa
Patent:
7,016,346 →
Application:
09/469,979 →
Method and Apparatus for Distribution of Bandwidth in a Switch
Patent:
7,215,678 →
Application:
09/546,494 →
Method and Arrangement for Managing Packet Queues in Switches
Patent:
6,977,940 →
Application:
09/560,105 →
CAM/RAM memory device with a scalable structure
Patent:
6,330,177 →
Application:
09/574,354 →
Method for Flow Control in a Switch and a Switch Controlled Thereby
Patent:
7,061,868 →
Application:
09/697,708 →
Device for Datastream Decoding
Scheduler Method and Device in a Switch
Method and Apparatus for Content Addressable Memory with a Partitioned Match Line
Device for Datastream Decoding
Variability-Aware Scheme for High-Performance Asynchronous Circuit Voltage Reglulation
Asynchronous Scheme for Clock Domain Crossing
Mixed-Sized Pillars That Are Probeable and Routable
Parallel Signal via Structure
Testing of Thru-Silicon Vias
Error Detection and Correction in Ternary Content Addressable Memory (TCAM)
Error Detection and Correction in Binary Content Addressable Memory (Bcam)
Memory Optimization in VLSI Design Using Generic Memory Models
Generating Specific Memory Models Using Generic Memory Models for Designing Memories in VLSI Design
Designing Memories in VLSI Design Using Specific Memory Models Generated from Generic Memory Models
Integrated Circuit Design Optimization
Scaling Logic Components of Integrated Circuit Design
Scaling Memory Components of Integrated Circuit Design
Scaling of Integrated Circuit Design Including Logic and Memory Components
Integrated Circuit Design Scaling for Recommending Design Point
Scaling of Integrated Circuit Design Including High-Level Logic Components
Communication Interface Architecture Using Serializer/Deserializer
Wireless Probes
Elongated Pad Structure
Duo Content Addressable Memory (Cam) Using a Single Cam
Scaling of Integrated Circuit Design Including High-Level Logic Components
Application:
15/250,885 →
Publication:
US 2016/0371411
Related Assignments
(25)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Feb 24, 2010
From: CORTADELLA, JORDI; LAVAGNO, LUCIANO; MACIAN, CARLOS; MARTORELL, FERRAN
To: ELASTIX CORPORATION, INC.
Reel/Frame 023986/0458 →
Security Agreement
Aug 14, 2012
From: ESILICON CORPORATION
To: GOLD HILL CAPITAL 2008, LP; SILICON VALLEY BANK
Reel/Frame 028782/0322 →
Assignment of Assignor's Interest
Mar 26, 2013
From: ADARA VENTURES SICAR; COINVERSION NEOTEC, S.A., S.C.R., DE REGIMEN SIMPLIFICADO
To: ESILICON CORPORATION
Reel/Frame 030085/0527 →
Assignment of Assignor's Interest
Jun 12, 2014
From: DELACRUZ, JAVIER
To: ESILICON CORPORATION
Reel/Frame 033093/0505 →
Assignment of Assignor's Interest
Jun 12, 2014
From: DELACRUZ, JAVIER
To: ESILICON CORPORATION
Reel/Frame 033093/0502 →
Assignment of Assignor's Interest
Jun 12, 2014
From: DELACRUZ, JAVIER
To: ESILICON CORPORATION
Reel/Frame 033093/0492 →
Assignment of Assignor's Interest
Sep 30, 2014
From: ZAMPAGLIONE, MICHAEL; WIK, THOMAS
To: ESILICON CORPORATION
Reel/Frame 033857/0457 →
Assignment of Assignor's Interest
Sep 30, 2014
From: ZAMPAGLIONE, MICHAEL; WIK, THOMAS
To: ESILICON CORPORATION
Reel/Frame 033857/0471 →
Assignment of Assignor's Interest
Feb 27, 2015
From: SUBRAMANIAM, PRASAD; PHUONG, HAI
To: ESILICON CORPORATION
Reel/Frame 035056/0299 →
Security Interest
Aug 18, 2017
From: ESILICON CORPORATION
To: RUNWAY GROWTH CREDIT FUND INC.
Reel/Frame 043334/0521 →
Release of Security Interest
Dec 7, 2017
From: GOLD HILL CAPITAL 2008, LP
To: ESILICON CORPORATION
Reel/Frame 044335/0115 →
Release of Security Interest
Nov 1, 2018
From: SILICON VALLEY BANK
To: ESILICON CORPORATION
Reel/Frame 047389/0039 →
Assignment of Assignor's Interest
Nov 19, 2018
From: ESILICON CORPORATION
To: TESSERA ADVANCED TECHNOLOGIES, INC.
Reel/Frame 047547/0192 →
Release of Security Interest
Nov 20, 2018
From: RUNWAY GROWTH CREDIT FUND INC.
To: ESILICON CORPORATION
Reel/Frame 047558/0129 →
Release of Security Interest
Jun 21, 2019
From: SILICON VALLEY BANK
To: ESILICON CORPORATION
Reel/Frame 049558/0449 →
Assignment of Assignor's Interest
Jan 20, 2020
From: ESILICON CORPORATION
To: INPHI CORPORATION
Reel/Frame 051559/0136 →
Assignment of Assignor's Interest
Jan 20, 2020
From: ESILICON CORPORATION
To: INPHI CORPORATION
Reel/Frame 051558/0385 →
Assignment of Assignor's Interest
Jan 20, 2020
From: ESILICON CORPORATION
To: INPHI CORPORATION
Reel/Frame 051558/0396 →
Assignment of Assignor's Interest
Jan 20, 2020
From: ESILICON CORPORATION
To: INPHI CORPORATION
Reel/Frame 051558/0423 →
Assignment of Assignor's Interest
Jan 20, 2020
From: ESILICON CORPORATION
To: INPHI CORPORATION
Reel/Frame 051558/0439 →
Assignment of Assignor's Interest
Jan 20, 2020
From: ESILICON CORPORATION
To: INPHI CORPORATION
Reel/Frame 051558/0481 →
Assignment of Assignor's Interest
Jan 20, 2020
From: ESILICON CORPORATION
To: INPHI CORPORATION
Reel/Frame 051558/0492 →
Assignment of Assignor's Interest
Jan 20, 2020
From: ESILICON CORPORATION
To: INPHI CORPORATION
Reel/Frame 051558/0500 →
Assignment of Assignor's Interest
Jan 20, 2020
From: ESILICON CORPORATION
To: INPHI CORPORATION
Reel/Frame 051558/0526 →
Assignment of Assignor's Interest
Jan 20, 2020
From: ESILICON CORPORATION
To: INPHI CORPORATION
Reel/Frame 051558/0551 →