IP Library Assignment 049558/0449
Patent Assignment
Reel/Frame 049558/0449

Release of Security Interest

Recorded: 2019-06-21 Pages: 16
Assignor
SILICON VALLEY BANK
Executed: 2019-06-20
Assignee
ESILICON CORPORATION
2130 GOLD STREET, SUITE 100, SAN JOSE, CALIFORNIA, 95002
Covered Properties (50)
A Variability-Aware Scheme for Asynchronous Circuit Initialization
A Variability-Aware Asynchronous Scheme for High-Performance Delay Matching
A Variability-Aware Scheme for High-Performance Asynchronous Circuit Voltage Regulation
Apparatus and Method for Self-Synchronization of Data to a Local Clock
Patent: 6,604,203 →
Application: 09/394,376 →
Multicasting Method and Arrangement
Patent: 6,625,151 →
Application: 09/420,909 →
Queue Management System Performing One Read One Write During One Cycle by Using Free Queues
Patent: 6,754,742 →
Application: 09/428,285 →
Apparatus and Method for Converting Data in Serial Format to Parallel Format and Vice Versa
Patent: 7,016,346 →
Application: 09/469,979 →
Mask Arrangement for Scalable Cam/Ram Structures
Patent: 6,134,135 →
Application: 09/480,827 →
Method and Apparatus for Distribution of Bandwidth in a Switch
Patent: 7,215,678 →
Application: 09/546,494 →
Method and Arrangement for Managing Packet Queues in Switches
Patent: 6,977,940 →
Application: 09/560,105 →
CAM/RAM memory device with a scalable structure
Patent: 6,330,177 →
Application: 09/574,354 →
Method for Flow Control in a Switch and a Switch Controlled Thereby
Patent: 7,061,868 →
Application: 09/697,708 →
Device for Datastream Decoding
Patent: 7,002,983 →
Application: 09/738,720 →
Publication: US 2001/0046238
Scheduler Method and Device in a Switch
Patent: 6,944,171 →
Application: 09/804,591 →
Publication: US 2002/0126683
Method and Apparatus for Content Addressable Memory with a Partitioned Match Line
Patent: 6,477,071 →
Application: 09/850,882 →
Publication: US 2002/0163823
Adaptive Real-Time Work-in-Progress Tracking, Prediction, and Optimization System for a Semiconductor Supply Chain
Patent: 6,748,287 →
Application: 09/912,028 →
Prediction Based Optimization of a Semiconductor Supply Chain Using an Adaptive Real Time Work-in-Progress Tracking System
Patent: 7,218,980 →
Application: 09/912,030 →
Heat Exchanger Plate and Such a Plate with a Gasket
Patent: 6,935,415 →
Application: 10/018,670 →
Double Ferrule Sc Connector and Adapter
Patent: 40,622 →
Application: 10/032,516 →
Laser Projection Display System
Patent: 6,577,429 →
Application: 10/050,003 →
System and Method for Automating Integration of Semiconductor Work in Process Updates
Patent: 7,474,933 →
Application: 10/619,738 →
Publication: US 2005/0060212
Device for Datastream Decoding
Patent: 7,158,529 →
Application: 11/255,759 →
Publication: US 2006/0034312
Crossbar Switch with Grouped Inputs and Outputs
Patent: 7,603,509 →
Application: 12/069,037 →
Variability-Aware Scheme for Asynchronous Circuit Initialization
Patent: 7,701,255 →
Application: 12/265,571 →
Publication: US 2009/0115469
Variability-Aware Scheme for High-Performance Asynchronous Circuit Voltage Reglulation
Patent: 8,572,539 →
Application: 12/265,585 →
Publication: US 2009/0115503
System and Method for Automating Integration of Semiconductor Work in Process Updates
Patent: 7,756,598 →
Application: 12/346,651 →
Publication: US 2009/0106066
Pushed-Rule Bit Cells with New Functionality
Patent: 8,355,269 →
Application: 12/592,472 →
Asynchronous Scheme for Clock Domain Crossing
Patent: 8,433,875 →
Application: 12/711,909 →
Publication: US 2011/0204932
Network of Tightly Coupled Performance Monitors for Determining the Maximum Frequency of Operation of a Semiconductor Ic
Patent: 8,446,224 →
Application: 13/181,362 →
Publication: US 2012/0013408
Error Detection and Correction in Ternary Content Addressable Memory (TCAM)
Patent: 9,762,261 →
Application: 14/502,954 →
Publication: US 2015/0095738
Error Detection and Correction in Binary Content Addressable Memory (Bcam)
Patent: 9,529,669 →
Application: 14/502,966 →
Publication: US 2015/0095740
Memory Optimization in VLSI Design Using Generic Memory Models
Patent: 9,852,250 →
Application: 14/628,105 →
Publication: US 2016/0246910
Generating Specific Memory Models Using Generic Memory Models for Designing Memories in VLSI Design
Patent: 9,727,681 →
Application: 14/628,668 →
Publication: US 2016/0246909
Designing Memories in VLSI Design Using Specific Memory Models Generated from Generic Memory Models
Patent: 9,727,682 →
Application: 14/628,676 →
Publication: US 2016/0246911
Integrated Circuit Design Optimization
Patent: 9,454,636 →
Application: 14/677,206 →
Publication: US 2016/0292343
Scaling Logic Components of Integrated Circuit Design
Patent: 9,460,254 →
Application: 14/678,697 →
Publication: US 2016/0292313
Scaling Memory Components of Integrated Circuit Design
Patent: 9,454,628 →
Application: 14/678,702 →
Publication: US 2016/0292314
Scaling of Integrated Circuit Design Including Logic and Memory Components
Patent: 9,460,255 →
Application: 14/678,708 →
Publication: US 2016/0292315
Integrated Circuit Design Scaling for Recommending Design Point
Patent: 9,460,256 →
Application: 14/678,711 →
Publication: US 2016/0292316
Scaling of Integrated Circuit Design Including High-Level Logic Components
Patent: 9,460,257 →
Application: 14/678,715 →
Publication: US 2016/0292317
Communication Interface Architecture Using Serializer/Deserializer
Patent: 9,984,997 →
Application: 14/810,261 →
Publication: US 2016/0027482
Wireless Probes
Application: 14/963,076 →
Publication: US 2016/0161554
Elongated Pad Structure
Application: 14/963,081 →
Publication: US 2016/0163669
Duo Content Addressable Memory (Cam) Using a Single Cam
Patent: 9,711,220 →
Application: 14/963,087 →
Publication: US 2016/0163385
Scaling of Integrated Circuit Design Including High-Level Logic Components
Application: 15/250,885 →
Publication: US 2016/0371411
Bandgap Circuits with Voltage Calibration
Application: 16/222,929 →
Successive Approximation Register (SAR) Analog to Digital Converter (ADC) with Partial Loop-Unrolling
Application: 16/239,421 →
Baseline Wander Compensation in SerDes Transceivers
Application: 16/270,512 →
Tunable Voltage Controlled Oscillators
Application: 16/273,047 →
Trans-Impedance Amplifier (Tia) with a T-Coil Feedback Loop
Application: 16/298,945 →
Publication: US 2020/0295720
Related Assignments (25)
Other recorded transfers of the patents in this record — the chain of ownership.
Security Interest Feb 21, 2012
From: EASTMAN KODAK COMPANY; PAKON, INC.
To: CITICORP NORTH AMERICA, INC., AS AGENT
Reel/Frame 028201/0420 →
Security Agreement Aug 14, 2012
From: ESILICON CORPORATION
To: GOLD HILL CAPITAL 2008, LP; SILICON VALLEY BANK
Reel/Frame 028782/0322 →
Release of Security Interest in Patents Sep 5, 2013
From: CITICORP NORTH AMERICA, INC., AS SENIOR DIP AGENT; WILMINGTON TRUST, NATIONAL ASSOCIATION, AS JUNIOR DIP AGENT
To: EASTMAN KODAK COMPANY; PAKON, INC.
Reel/Frame 031157/0451 →
Intellectual Property Security Agreement (Abl) Sep 5, 2013
From: EASTMAN KODAK COMPANY; FAR EAST DEVELOPMENT LTD.; FPC INC.; KODAK (NEAR EAST), INC.
To: BANK OF AMERICA N.A., AS AGENT
Reel/Frame 031162/0117 →
Intellectual Property Security Agreement (Second Lien) Sep 5, 2013
From: EASTMAN KODAK COMPANY; FAR EAST DEVELOPMENT LTD.; FPC INC.; KODAK (NEAR EAST), INC.
To: BARCLAYS BANK PLC, AS ADMINISTRATIVE AGENT
Reel/Frame 031159/0001 →
Intellectual Property Security Agreement (First Lien) Sep 5, 2013
From: EASTMAN KODAK COMPANY; FAR EAST DEVELOPMENT LTD.; FPC INC.; KODAK (NEAR EAST), INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE
Reel/Frame 031158/0001 →
Assignment of Assignor's Interest Jul 6, 2015
From: ADC TELECOMMUNICATIONS, INC.
To: TYCO ELECTRONICS SERVICES GMBH
Reel/Frame 036060/0174 →
Assignment of Assignor's Interest Oct 26, 2015
From: TYCO ELECTRONICS SERVICES GMBH
To: COMMSCOPE EMEA LIMITED
Reel/Frame 036956/0001 →
Assignment of Assignor's Interest Oct 29, 2015
From: COMMSCOPE EMEA LIMITED
To: COMMSCOPE TECHNOLOGIES LLC
Reel/Frame 037012/0001 →
Patent Security Agreement (Abl) Jan 13, 2016
From: COMMSCOPE TECHNOLOGIES LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 037514/0196 →
Patent Security Agreement (Term) Jan 13, 2016
From: COMMSCOPE TECHNOLOGIES LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 037513/0709 →
Release of Security Interest Feb 12, 2016
From: JP MORGAN CHASE BANK, N.A.
To: EASTMAN KODAK COMPANY
Reel/Frame 037809/0278 →
Release of Security Interest Feb 12, 2016
From: BANK OF AMERICA, N.A.
To: EASTMAN KODAK COMPANY
Reel/Frame 037809/0296 →
Release of Security Interest Feb 12, 2016
From: BARCLAYS BANK PLC
To: EASTMAN KODAK COMPANY
Reel/Frame 037809/0285 →
Assignment of Assignor's Interest Feb 22, 2016
From: EASTMAN KODAK COMPANY
To: IMAX CORPORATION
Reel/Frame 037790/0724 →
Change of Name Jun 20, 2016
From: IMAX EMEA LIMITED
To: IMAX THEATRES INTERNATIONAL LIMITED
Reel/Frame 039083/0221 →
Assignment of Assignor's Interest Jun 20, 2016
From: IMAX CORPORATION
To: IMAX EMEA LIMITED
Reel/Frame 039082/0825 →
Security Interest Aug 18, 2017
From: ESILICON CORPORATION
To: RUNWAY GROWTH CREDIT FUND INC.
Reel/Frame 043334/0521 →
Security Interest Sep 22, 2017
From: ESILICON CORPORATION
To: SILICON VALLEY BANK
Reel/Frame 043669/0832 →
Release of Security Interest Dec 7, 2017
From: GOLD HILL CAPITAL 2008, LP
To: ESILICON CORPORATION
Reel/Frame 044335/0115 →
Security Interest Mar 15, 2019
From: ESILICON CORPORATION
To: SILICON VALLEY BANK
Reel/Frame 048616/0009 →
Release of Security Interest Apr 9, 2019
From: JPMORGAN CHASE BANK, N.A.
To: REDWOOD SYSTEMS, INC.; ALLEN TELECOM LLC; ANDREW LLC; COMMSCOPE, INC. OF NORTH CAROLINA
Reel/Frame 049260/0001 →
Release of Security Interest Apr 9, 2019
From: JPMORGAN CHASE BANK, N.A.
To: REDWOOD SYSTEMS, INC.; ALLEN TELECOM LLC; ANDREW LLC; COMMSCOPE, INC. OF NORTH CAROLINA
Reel/Frame 048840/0001 →
Release of Security Interest Jul 22, 2019
From: JP MORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: EASTMAN KODAK COMPANY; FAR EAST DEVELOPMENT LTD.; FPC, INC.; KODAK (NEAR EAST), INC.
Reel/Frame 049814/0001 →
Assignment of Assignor's Interest Jan 20, 2020
From: ESILICON CORPORATION
To: INPHI CORPORATION
Reel/Frame 051558/0575 →