Patent Assignment
Reel/Frame 071435/0290
Assignment of Assignor's Interest
Recorded: 2025-06-17
Received: 2025-06-17
Pages: 4
Assignor
SANDISK TECHNOLOGIES INC.
Executed: 2025-04-25
Assignee
PALISADE TECHNOLOGIES, LLP
1468 JAMES ROAD, GARDNERVILLE, NV, 89460, UNITED STATES
Covered Properties
(29)
Detection of High-Risk Unstable Atherosclerotic Plaque
Application:
18/408,961 →
Protection Against State Transition Errors in Solid-State Data Storage Systems
Application:
15/466,004 →
Temperature Compensation Management in Solid-State Memory
Application:
15/053,133 →
Three-Dimensional Memory Devices Having a Shaped Epitaxial Channel Portion
Application:
14/927,990 →
Data Retention Charge Loss and Read Disturb Compensation in Solid-State Data Storage Systems
Application:
14/929,080 →
Method of Making a Multilevel Memory Stack Structure Using a Cavity Containing a Sacrificial Fill Material
Application:
14/834,830 →
Operation Modes for an Inverted Nand Architecture
Application:
14/557,004 →
Temperature Compensation Management in Solid-State Memory
Application:
14/482,852 →
Programming Non-Volatile Storage with Fast Bit Detection and Verify Skip
Application:
14/231,585 →
Non-Volatile Memory Interface
Application:
14/231,437 →
Dynamic Adjustment of Read Voltage Levels Based on Memory Cell Threshold Voltage Distribution
Application:
13/743,563 →
Host Device and Method for Accessing a Virtual File in a Storage Device by Bypassing a Cache in the Host Device
Application:
13/436,343 →
Host Device and Method for Accessing a Virtual File in a Storage Device by Bypassing a Cache in the Host Device
Application:
13/436,373 →
Memory System with Sectional Data Lines
Application:
13/362,320 →
Memory System with Sectional Data Lines
Application:
13/362,311 →
Apparatus, System, and Method for an Interface Between a Memory Controller and a Non-Volatile Memory Controller Using a Command Protocol
Application:
13/248,006 →
System and Method for Bonded Configuration Pad Continuity Check
Application:
13/039,110 →
Selectively Enabling a Host Transfer Interrupt
Application:
12/976,608 →
Programming Non-Volatile Memory with High Resolution Variable Initial Programming Pulse
Application:
12/427,013 →
Programming Non-Volatile Memory with Variable Initial Programming Pulse
Application:
12/427,007 →
Memory System with Sectional Data Lines
Application:
12/410,648 →
Adaptive Erase and Soft Programming for Memory
Application:
12/332,646 →
Data Protection for Write Abort
Application:
12/025,937 →
Methods and Apparatus for Using a Configuration Array Similar to an Associated Data Array
Application:
11/669,923 →
System Using a Direct Data File System with a Continuous Logical Address Space Interface
Application:
11/616,236 →
Use of a Direct Data File System with a Continuous Logical Address Space Interface and Control of File Address Storage in Logical Blocks
Application:
11/616,242 →
Host System with Direct Data File Interface Configurability
Application:
11/616,228 →
Memory with Cell Population Distribution Assisted Read Margining
Application:
11/535,879 →
Methods of Cell Population Distribution Assisted Read Margining
Application:
11/535,853 →