Patent Assignment
Reel/Frame 075810/0219
Assignment of Assignor's Interest
Recorded: 2026-08-27
Pages: 10
Assignor
RENESAS ELECTRONICS AMERICA INC.
Executed: 2026-07-01
Assignee
SITIME CORPORATION
5451 PATRICK HENRY DRIVE, SANTA CLARA, CALIFORNIA, 95054
Covered Properties
(31)
Use of Ring Oscillators for Multi-Stop Time Measurements
Apparatus and Methods for Automatic Time Measurements
Frequency Synthesizer with Tunable Accuracy
Frequency Synthesizer with Tunable Accuracy
Hitless Re-Arrangements in Coupled Digital Phase-Locked Loops
Hitless Re-Arrangements in Coupled Digital Phase-Locked Loops
Time Slotted Bus System for Multiple Coupled Digital Phase-Locked Loops
Time Slotted Bus System for Multiple Coupled Digital Phase-Locked Loops
Separate Clock Synchronous Architecture
Wirelessly Synchronized Clock Networks
Wirelessly Synchronized Clock Networks
Pulse Width Modulation (PWM) to Align Clocks Across Multiple Separated Cards Within a Communication System
Patent:
10,075,284 →
Application:
15/364,602 →
Fractional Divider Using a Calibrated Digital-to-Time Converter
Patent:
9,678,481 →
Application:
15/185,378 →
Frequency Divider with Selectable Frequency and Duty Cycle
Fractional Divider Using a Calibrated Digital-to-Time Converter
Bulk Acoustic Wave Resonator Based Fractional Frequency Synthesizer and Method of Use
Patent:
9,954,541 →
Application:
15/084,067 →
Dual Mode Clock Using a Common Resonator and Associated Method of Use
Patent:
9,581,973 →
Application:
15/083,831 →
Methods and Systems for Analog-to-Digital Conversion (Adc) Using an Ultra Small Capacitor Array with Full Range and Sub-Range Modes
Patent:
9,553,602 →
Application:
15/076,327 →
Arbitrary Delay Buffer
Adaptive High-Speed Current-Steering Logic (Hcsl) Drivers
Patent:
9,838,016 →
Application:
15/050,646 →
Calibration Method and Apparatus for Phase Locked Loop Circuit
Patent:
9,654,121 →
Application:
15/169,997 →
Frequency Synthesizer with Microcode Control
Patent:
9,847,869 →
Application:
15/210,204 →
Buffer with Programmable Input/Output Phase Relationship
Patent:
9,859,901 →
Application:
15/064,369 →
Phase Locked Loop (Pll) Timing Device Evaluation System and Method for Evaluating Pll Timing Devices
Patent:
9,852,039 →
Application:
15/015,094 →
Methods and Apparatus for Synchronizing Operations Using Separate Asynchronous Signals
Patent:
9,479,182 →
Application:
14/975,388 →
Multi-Stage Frequency Dividers Having Duty Cycle Correction Circuits Therein
Patent:
9,543,960 →
Application:
14/966,913 →
Monolithic Composite Resonator Devices with Reduced Sensitivity to Acceleration and Vibration
Patent:
9,431,955 →
Application:
14/985,689 →
Timing Device Having Multi-Purpose Pin with Proactive Function
Patent:
9,954,516 →
Application:
14/830,698 →
High-Speed Programmable Frequency Divider with 50% Output Duty Cycle
Patent:
9,590,637 →
Application:
14/839,817 →
Methods and Apparatus for Transmitting Data Over a Clock Signal
Patent:
9,628,255 →
Application:
14/975,226 →
Low-Spurious Fractional N-Frequency Divider and Method of Use
Patent:
9,362,928 →
Application:
14/794,782 →
Related Assignments
(18)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Mar 21, 2016
From: WU, I-CHANG; BAL, JAGDEEP
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 038055/0195 →
Assignment of Assignor's Interest
Mar 29, 2016
From: GOYAL, PANKAJ; AYCOCK, STEPHEN E.
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 038126/0742 →
Assignment of Assignor's Interest
Mar 29, 2016
From: GOYAL, PANKAJ; BAL, JAGDEEP; AYCOCK, STEPHEN E.
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 038125/0369 →
Assignment of Assignor's Interest
Apr 1, 2016
From: HE, CHENGMING
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 038176/0280 →
Assignment of Assignor's Interest
Aug 2, 2016
From: GAO, SONG; BUELL, BRIAN; BLINICK, KATHERINE T.
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 039315/0941 →
Assignment of Assignor's Interest
Nov 9, 2016
From: GEISS, RICHARD
To: INTEGRATED DEVICE TECHNOLOGIES, INC.
Reel/Frame 040268/0392 →
Assignment of Assignor's Interest
Nov 30, 2016
From: RODRIGUES, SILVANA; RUPERT, MICHAEL; BAIDAS, ZAHER; GOLDIN, LEON
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 040465/0774 →
Assignment of Assignor's Interest
Jan 18, 2017
From: LI, HUI; NG, TECK-CHUAN; AYCOCK, STEPHEN E.
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 041005/0124 →
Assignment of Assignor's Interest
Mar 31, 2017
From: BAL, JAGDEEP; WADE, RON
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 041805/0615 →
Assignment of Assignor's Interest
Mar 31, 2017
From: BAL, JAGDEEP; AYACHE, ELIE; VAN KEULEN, EDUARD
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 041810/0478 →
Security Agreement
Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
Assignment of Assignor's Interest
Dec 5, 2017
From: SPIJKER, MENNO
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 044299/0240 →
Assignment of Assignor's Interest
Dec 7, 2017
From: SPIJKER, MENNO
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 044326/0159 →
Assignment of Assignor's Interest
Dec 20, 2017
From: CHU, MIN
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 044925/0192 →
Assignment of Assignor's Interest
Feb 6, 2018
From: CHU, MIN; BAL, JAGDEEP SINGH
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 044845/0672 →
Security Interest
May 21, 2018
From: INTEGRATED DEVICE TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 045860/0784 →
Release of Security Interest
Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION
Reel/Frame 048746/0001 →
Release of Security Interest
Jan 15, 2026
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 073487/0395 →