Method of forming an inductor on a semiconductor wafer
View Patent ↗A semiconductor device has a substrate with an inductor formed on its surface. First and second contact pads are formed on the substrate. A passivation layer is formed over the substrate and first and second contact pads. A protective layer is formed over the passivation layer. The protective layer is removed over the first contact pad, but not from the second contact pad. A conductive layer is formed over the first contact pad. The conductive layer is coiled on the surface of the substrate to produce inductive properties. The formation of the conductive layer involves use of a wet etchant. The second contact pad is protected from the wet etchant by the protective layer. The protective layer is removed from the second contact pad after forming the conductive layer over the first contact pad. An external connection is formed on the second contact pad.
1. A semiconductor device, comprising:
a substrate;
a first contact pad and second contact pad formed in contact with a surface of the substrate;
a first insulating layer formed in contact with the surface of the substrate and including a first opening over the first contact pad and a second opening over the second contact pad;
a protective layer formed over a surface of the first insulating layer and further over the second contact pad within the second opening opposite the surface of the substrate, wherein the first contact pad and a portion of the first insulating layer around the first contact pad are exposed from the protective layer;
a first conductive layer formed over the first contact pad and the protective layer and wound to exhibit an inductive property while the protective layer protects the second contact pad; and
a second insulating layer formed over the protective layer.
2. The semiconductor device of claim 1 , further including an interconnect structure formed over and electrically connected to the second contact pad.
3. The semiconductor device of claim 2 , wherein the interconnect structure includes a wire bond, bump, or conductive via.
4. The semiconductor device of claim 1 , further including:
a second conductive layer formed over the second insulating layer;
a third insulating layer formed over the second conductive layer and second insulating layer; and
a bump formed over the second conductive layer.
5. The semiconductor device of claim 1 , wherein the protective layer includes an insulating material.
6. The semiconductor device of claim 1 , further including a second conductive layer formed over the second insulating layer and electrically connected to the second contact pad.
7. A semiconductor device, comprising:
a substrate;
a first contact pad formed on a surface of the substrate;
a second contact pad formed on the surface of the substrate;
a first insulating layer formed on the surface of the substrate and including a first opening extending to the first contact pad and a second opening extending to the second contact pad;
a protective layer formed over a surface of the first insulating layer and further over the second contact pad within the second opening opposite the surface of the substrate; and
a first conductive layer wound over the first contact pad and protective layer while the protective layer protects the second contact pad.
8. The semiconductor device of claim 7 , further including:
a second insulating layer formed over the first conductive layer and first insulating layer; and
an interconnect structure formed over and electrically connected to the second contact pad.
9. The semiconductor device of claim 8 , wherein the interconnect structure includes a wire bond, bump, or conductive via.
10. The semiconductor device of claim 8 , further including:
a second conductive layer formed over the second insulating layer;
a third insulating layer formed over the second conductive layer and second insulating layer; and
a bump formed over the second conductive layer.
11. The semiconductor device of claim 7 , further including a second conductive layer formed over the first contact pad while the protective layer protects the second contact pad.
12. The semiconductor device of claim 7 , wherein the protective layer includes an insulating material.
13. The semiconductor device of claim 7 , wherein the first contact pad and a portion of the first insulating layer around the first contact pad are exposed from the protective layer.
14. A semiconductor device, comprising:
a substrate;
a first conductive layer formed on a surface of the substrate;
a second conductive layer formed on the surface of the substrate;
a protective layer formed over the second conductive layer opposite the surface of the substrate while the first conductive layer remains exposed from the protective layer;
a third conductive layer wound over the first conductive layer and protective layer;
a first insulating layer formed on the surface of the substrate and including a first opening extending to the first conductive layer and a second opening extending to the second conductive layer, wherein the protective layer is formed over the second conductive layer within the second opening opposite the surface of the substrate; and
a second insulating layer formed over the protective layer and first insulating layer.
15. The semiconductor device of claim 14 , further including an interconnect structure formed over the second conductive layer.
16. The semiconductor device of claim 15 , wherein the interconnect structure includes a wire bond, bump, or conductive via.
17. The semiconductor device of claim 14 , further including:
a fourth conductive layer formed over the second insulating layer;
a third insulating layer formed over the fourth conductive layer and second insulating layer; and
a bump formed over the fourth conductive layer.
18. The semiconductor device of claim 14 , wherein the protective layer includes an insulating material.
19. The semiconductor device of claim 14 , wherein the first conductive layer and a portion of the first insulating layer around the first conductive layer are exposed from the protective layer.
20. A semiconductor device, comprising:
a substrate;
a first conductive layer formed on a surface of the substrate;
a protective layer formed in contact with the first conductive layer opposite the surface of the substrate;
a second conductive layer formed over the substrate; and
a first insulating layer formed on the surface of the substrate and including an opening over the first conductive layer, wherein the protective layer is formed over the first conductive layer within the opening opposite the surface of the substrate.
21. The semiconductor device of claim 20 , wherein the second conductive layer is wound to exhibit an inductive property.
22. The semiconductor device of claim 20 , further including a third conductive layer formed on the surface of the substrate and including an opening in the first insulating layer extending to the third conductive layer, wherein the third conductive layer and a portion of the first insulating layer around the third conductive layer are exposed from the protective layer.
23. The semiconductor device of claim 20 , further including:
a second insulating layer formed over the second conductive layer and first insulating layer; and
an interconnect structure formed over the first conductive layer.
24. The semiconductor device of claim 23 , wherein the interconnect structure includes a wire bond, bump, or conductive via.
25. The semiconductor device of claim 23 , further including:
a third conductive layer formed over the second insulating layer;
a third insulating layer formed over the third conductive layer and second insulating layer; and
a bump formed over the third conductive layer.