IP Library Granted Patent US 6,483,342
Granted Patent Utility
US 6,483,342 · Confirmation No. 1230

MULTI-MASTER MULTI-SLAVE SYSTEM BUS IN A FIELD PROGRAMMABLE GATE ARRAY (FPGA)

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Code Description Pages PDF
2019-05-21 OATH Oath or Declaration filed 131 View
2001-05-25 TRNA Transmittal of New Application 1 View
2001-05-25 SPEC Specification 19 View
2001-05-25 CLM Claims 5 View
2001-05-25 ABST Abstract 1 View
2001-05-25 DRW Drawings-only black and white line drawings 4 View
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Quick Facts
Patent No.
US 6,483,342
App. No.
09/864,277
Filed
2001-05-25
Granted
2002-11-19
Pub. No.
US20020008540A1
Examiner
LE, DON P
Art Unit
2819
PTA
-22 days