Granted Patent
Utility
US 6,472,904
· Confirmation No. 1233
DOUBLE DATA RATE INPUT AND OUTPUT IN A PROGRAMMABLE LOGIC DEVICE
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2019-05-21 | OATH |
Oath or Declaration filed | 131 | View | |
| 2001-05-25 | TRNA |
Transmittal of New Application | 1 | View | |
| 2001-05-25 | SPEC |
Specification | 18 | View | |
| 2001-05-25 | CLM |
Claims | 4 | View | |
| 2001-05-25 | ABST |
Abstract | 1 | View | |
| 2001-05-25 | DRW |
Drawings-only black and white line drawings | 12 | View |
Inventors
William B. Andrews
Long Pond, PA
Barry K. Britton
Orefield, PA
Attorneys & Agents of Record
Classification
USPC
326/38
G06F1/10
H03K5/13
H03K5/133
H03K19/017581
H03K19/17732
H03K19/17736
H03K19/1774
H03K19/17744
H03K19/17748
H03K19/1776
H03K19/17788
H03K19/17792
H03L7/081
H03L7/0996
Prosecution
Publication
- Pub. No.
- US20020003436A1
- Pub. Date
- 2002-01-10
Patent Term Adjustment
-13days
RELEASE OF SECURITY INTEREST
Recorded 2019-05-21
SECURITY INTEREST
Recorded 2019-05-21
SECURITY INTEREST
Recorded 2015-03-19
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2002-06-18
from
AGERE SYSTEMS INC.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2002-02-20
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2001-08-01
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