Encryption for a stream file in an FPGA integrated circuit

1. A method for encrypting a data stream used to program a field programmable gate array comprising:

receiving said data stream wherein said data stream is a string of bits;

detecting a first gap in said data stream wherein said first gap is bits in said stream for an unused address in said field programmable gate array;

determining whether encryption is enabled for said first gap;

inserting an encryption identifier into said first gap identifying whether encryption has been enabled;

encrypting bits in said stream of bits from a beginning of said first gap a prespecified number of bits at a time utilizing a prespecified set of bits as a bit mask, wherein:

the encrypting is a loop comprising:

selecting a next prespecified number of bits from the stream of bits as a selected set of bits;

toggling the specified set of bits from the selected set of bits; and

repeating the selecting and the toggling until a second gap in said stream for an unused address in said field programmable gate array is encountered;

detecting the second gap;

ending encryption of bits in said stream of bits at a beginning of said second gap in response to detecting said second gap; and

wherein the encrypting further comprise:

encrypting a first portion of bits in said first gap from said begining of said first gap responsive to a determination that encrypting is enabled; and

compressing data in a second portion of said first gap responsive to a determination that encrypting is not enabled.

2. The method of claim 1 further comprising:

detecting an end of said bits stream; and

ending encryption at the end of said bit stream.

3. The method of claim 1 further comprising:

compressing data in said stream of bits in response to a determination that encryption is not enabled.

4. The method of claim 1 , wherein said step of encrypting further comprises:

inserting random bits into said at least one gap.

5. The method of claim 1 , wherein said step of encrypting inserts non-random bits into said first gap.

6. A memory readable by a processing unit that stores instructions for directing said processing unit for encrypting bits in a data stream for programming a field programmable gate array, said instructions comprising instructions to:

receive said data stream wherein said data stream is a string of bits;

detect a first gap in said data stream wherein said first gap is bits in said stream for an unused address in said field programmable gate array;

determine whether encryption is enabled for said first gap;

insert an encryption identifier into said first gap identifying whether encryption has been enabled;

encrypt bits in said stream of bits prom a beginning of said first gap a prespecified number of bits at a time utilizing a prespecified set of bits as a bit mask, wherein:

the encrypting is a loop comprising:

selecting a next prespecified number of bits prom the stream of bits as a selected set of bits;

toggling the specified set of bits prom the selected set of bits; and

repeating the selecting and the toggling until a second gap is encountered;

detect the second gap, and

end encrypting of bits in said stream of bits at a beginning of said second

gap in response to detecting said second gap; and

wherein said instruction to encrypt further comprise:

encrypt a first portion of bits in said first gap from said beginning of said first gap responsive to a determination that encrypting is enabled, and

compress data in a second portion of said first gap responsive to a determination that encrypting is not enabled.

7. The memory of claim 6 wherein said instructions further comprise:

instructions for directing said processing unit to:

detect an end of said bits stream, and

end encryption at said end of said bit stream.

8. The memory of claim 6 wherein said instructions to encrypt further comprise:

instructions for directing said processing unit to:

compress data in said stream of bits in response to a determination that encryption is not enabled.

9. The memory claim 6 , wherein said instructions to encrypt further comprise:

instructions for directing said processing unit to:

insert random bits into said at least one gap.

10. The memory claim 6 , wherein said instruction to encrypt further comprise:

instructions directing said processing unit to:

insert non-random bits into said first gap.

11. An apparatus for encrypting a data stream used to program a field programmable gate array comprising:

means for receiving said data stream wherein said data stream is a string of bits;

means for detecting a first gap in said data stream wherein said first gap is bits in said stream for an unused address in said field programmable gate array;

means for determining whether encryption is enabled for said first gap;

means for inserting an encryption identifier into said first gap identifying whether encryption has been enabled;

means for encrypting bits in said stream of bits from a beginning of said first gap a prespecified number of bits at a time utilizing a prespecified set of bits as a bit mask, wherein: the encrypting is a loop comprising:

selecting a next prespecified number of bits from the stream of bits as a selected set of bits;

toggling the specified set of bits from the selected set of bits and

repeating the selecting and the toggling until a second gap is encountered;

means for detecting the second gap; and

means for ending encryption of bits in said stream of bits at a beginning of said second gap in response to detecting said second gap; and

wherein said means for encrypting further comprises:

means for encrypting a first portion bits in said first gap from said beginning of said first gap responsive to a determination that encrypting is enabled; and

means for compressing data in a second portion of said first gap responsive to a determination that encrypting is not enabled.

12. The apparatus of claim 11 further comprising:

means for detecting an end of said bits stream; and

means for ending encryption at the end of said bit stream.

13. The apparatus of claim 11 further comprising:

means for compressing data in said to a determination that encryption is not enabled.

14. The apparatus of claim 11 , wherein said means for encrypting further comprises:

means for inserting random bits into at least one gap.

15. The apparatus of claim 11 , wherein said means for encrypting further comprises:

means for inserting non-random bits into said first gap.

16. A method for decrypting a data stream used to program a field programmable gate array comprising:

receiving said data stream wherein said data stream is a string of bits;

detecting a first gap in said data stream wherein said first gap is bits in said stream for an unused address in said field programmable gate array;

reading an encryption identifier in said first gap;

determining whether encryption is enabled from said encryption identifier;

decrypting bits in said stream of bits from a beginning of said first gap responsive to a determination that encryption is enabled, wherein:

the decrypting is a loop comprising:

selecting a next prespecified number of bits from the stream of bits as a selected set of bits;

toggling a prespecified set of bits from the selected set of bits; and

repeating the selecting and the toggling until a second gap is encountered;

detecting the second gap;

ending decryption of bits in said stream of bits at a beginning of said second gap in response to detecting said second gap; and

wherein said step of decrypting further comprises:

decrypting a first portion of bits in said first gap from said beginning of said first gap responsive to a determination that encrypting is enabled; and

decompressing data in a second portion of said first gap responsive to a determination that encrypting is not enabled.

17. The method of claim 16 further comprising:

detecting an end of said bits stream; and

ending decryption at the end of said bit stream.

18. The method of claim 16 further comprising:

decompressing data in said first gap responsive to a determination that encryption is not enabled.

19. The method of claim 16 , wherein said step of decrypting further comprises:

removing inserted random bits from at least one gap.

20. The method of claim 16 , wherein said step of decrypting further comprises removing non-random bits inserted into said first gap.

21. A memory readable by a processing unit that stores instructions for directing said processing unit for decrypting bits in a data stream for programming a field programmable gate array, said instructions comprising instructions to:

receive said data stream wherein said data stream is a string of bits,

detect a first gap in said data stream wherein said first gap is bits in said stream for an unused address in said field programmable gate array,

read an encryption identifier from said first gap;

determine whether encryption is enabled for said first gap from said encryption identifier,

decrypt bits in said stream of bits from a beginning of said first gap, wherein:

the decrypting is a loop comprising:

selecting a next prespecified number of bits from the stream of bits as a selected set of bits;

toggling a prespecified set of bits from the selected set of bits; and

repeating the selecting and the toggling until a second gap is encountered;

detect the second gap, and

end decrypting of bits in said stream of bits at a beginning of said second gap in response to detecting said second gap; and

wherein said instructions to decrypt further comprise:

decrypt a first portion of bits in said gap from said beginning of said first gap responsive to a determination that encrypting is enabled, and

decompress data in a second portion of said first gap responsive to a determination that encrypting is not enabled.

22. The memory of claim 21 wherein said instructions further comprise:

instructions for directing said processing unit to:

detect an end of said bits stream, and

end decryption at said end of said bit stream.

23. The memory of claim 21 wherein said instructions to decrypt further comprise:

instructions for directing said processing unit to:

decompress data in said stream of bits to a determination that encryption is not enabled.

24. The memory claim 21 , wherein said instructions to decrypt further comprise:

instructions for directing said processing unit to:

remove random bits inserted into at least one gap.

25. The memory claim 21 , wherein said instructions to decrypt further comprise:

instructions directing said processing unit to:

remove non-random bits inserted into said first gap.

26. An apparatus for decrypting a data stream used to program a field programmable gate array comprising:

means for receiving said data stream wherein said data stream is a string of bits;

means for detecting a first gap in said data stream wherein said first gap is bits in said stream for an unused address in said field programmable gate array;

means for reading an encryption identifier in said first gap;

means for determining whether encryption is enabled from said encryption identifier;

means for decrypting bits in said stream of bits from a beginning of said first gap responsive to a determination that encryption is enabled, wherein:

the decrypting is a loop comprising:

selecting a next prespecified number of bits from the stream of bits as a selected set of bits;

toggling a prespecified set of bits from the selected set of bits; and

repeating the selecting and the toggling until a second gap is encountered;

means for detecting the second gap;

means for ending decryption of bits in said stream of bits at a beginning of said second gap in response to detecting said second gap; and

wherein said means for decrypting further comprises:

means for decrypting a first portion of bits in said first gap from said beginning of said gap responsive to a determination that encrypting is enabled; and

means for decompressing data in a second portion of said first gap responsive to a determination that encrypting is not enabled.

27. The apparatus of claim 26 further comprising:

means for detecting an end of said bits stream; and

means for ending decryption at the end of said bit stream.

28. The method of claim 26 further comprising:

means for decompressing data in said first gap responsive to a determination that encryption is not enabled.

29. The method of claim 26 , wherein said means for decrypting further comprises:

removing inserted random bits from at least one gap.

30. The method of claim 26 , wherein said means for decrypting further comprises removing non-random bits inserted into said first gap.