Patent Assignment
Reel/Frame 037393/0562
Change of Name
Recorded: 2015-12-28
Pages: 6
Assignor
ACTEL CORPORATION
Executed: 2012-08-23
Assignee
MICROSEMI SOC CORP.
3870 NORTH STREET, SAN JOSE, CALIFORNIA, 95134
Covered Properties
(101)
Programmable Multi-Standard I/O Architecture for Fpgas
Patent:
6,242,943 →
Application:
09/224,929 →
Method and Apparatus for Storing a Validation Number in a Field-Programmable Gate Array
Patent:
6,446,242 →
Application:
09/285,563 →
Integrated Circuit That Includes a Field-Programmable Gate Array and a Hard Gate Array Having the Same Underlying Structure
Patent:
6,211,697 →
Application:
09/318,198 →
Raised Tungsten Plug Antifuse and Fabrication Processes
Patent:
6,437,365 →
Application:
09/669,035 →
Cyclic Redundancy Checking of a Field Programmable Gate Array Having an Sram Memory Architecture
Metal-To-Metal Antifuse Structure and Fabrication Method
Radiation tolerant flash FPGA
Patent:
6,324,102 →
Application:
09/737,643 →
Programmable multi-standard I/O architecture for FPGAs
Flash based control for field programmable gate array
Patent:
6,356,478 →
Application:
09/748,648 →
Block Symmetrization in a Field Programmable Gate Array
Block Connector Splitting in Logic Block of a Field Programmable Gate Array
Encryption for a Stream File in an Fpga Integrated Circuit
Programmable Multi-Standard I/O Architecture for Fpgas
Patent:
6,762,621 →
Application:
10/024,661 →
Tileable Field-Programmable Gate Array Architecture
Patent:
6,744,278 →
Application:
10/061,951 →
Tileable Field-Programmable Gate Array Architecture
Patent:
6,700,404 →
Application:
10/066,398 →
Tileable Field-Programmable Gate Array Architecture
Patent:
7,426,665 →
Application:
10/066,539 →
User Available Body Scan Chain
Patent:
6,968,487 →
Application:
10/071,262 →
Method and Apparatus of Memory Clearing with Monitoring Memory Cells
Patent:
6,531,891 →
Application:
10/077,188 →
Routing Structures for a Tileable Field-Programmable Gate Array Architecture
Patent:
6,731,133 →
Application:
10/077,190 →
Three Input Field Programmable Gate Array Logic Circuit Configurable as a Three Input Look Up Table, a D-Latch or a D Flip-Flop
Patent:
6,777,977 →
Application:
10/137,729 →
Method and Apparatus for a Flexible Chargepump Scheme for Field-Programmable Gate Arrays
Patent:
6,774,667 →
Application:
10/143,721 →
Antifuse Incorporating Tantalum Nitride Barrier Layer
Patent:
6,713,369 →
Application:
10/157,777 →
Field-Programmable Gate Array Low Voltage Differential Signaling Driver Utilizing Two Complimentary Output Buffers
Patent:
6,891,394 →
Application:
10/163,096 →
Method and Apparatus for Bootstrapping a Programmable Antifuse Circuit
Patent:
6,765,427 →
Application:
10/216,332 →
Apparatus for Interfacing and Testing a Phase Locked Loop in a Field Programmable Gate Array
Patent:
7,434,080 →
Application:
10/235,245 →
Programmable Multi-Standard I/O Architecture for Fpgas
Carry Chain for Use Between Logic Modules in a Field Programmable Gate Array
Patent:
6,750,674 →
Application:
10/264,288 →
Parallel Programmable Antifuse Field Programmable Gate Array Device (Fpga) and a Method for Programming and Testing an Antifuse Fpga
Patent:
6,885,218 →
Application:
10/267,917 →
Field Programmable Gate Array Architecture Including a Buffer Module and a Method of Distributing Buffer Modules in a Field Programmable Gate Array
Patent:
6,727,726 →
Application:
10/293,895 →
Apparatus and Method for Initializing an Integrated Circuit Device and Activating a Function of the Device Once an Input Power Supply Has Reached a Threshold Voltage
Patent:
7,310,760 →
Application:
10/318,281 →
Multi-Level Routing Architecture in a Field Programmable Gate Array Having Transmitters and Receivers
Patent:
6,946,871 →
Application:
10/323,613 →
Programming Methods for an Amorphous Carbon Metal-to-Metal Antifuse
Patent:
6,728,126 →
Application:
10/327,675 →
Repeatable Block Producing a Non-Uniform Routing Architecture in a Field Programmable Gate Array Having Segmented Tracks
Patent:
6,891,396 →
Application:
10/330,672 →
Amorphous Carbon Metal-to-Metal Antifuse with Adhesion Promoting Layers
Patent:
6,965,156 →
Application:
10/331,144 →
Field Programmable Gate Array Freeway Architecture
Patent:
6,774,669 →
Application:
10/334,338 →
Field-Programmable Gate Array Architecture
Patent:
6,774,672 →
Application:
10/334,339 →
Intra-Tile Buffer System for a Field Programmable Gate Array
Patent:
6,774,670 →
Application:
10/334,340 →
Inter-Tile Buffer System for a Field Programmable Gate Array
Patent:
6,800,884 →
Application:
10/334,393 →
Apparatus and Method of Error Detection and Correction in a Radiation-Hardened Static Random Access Memory Field-Programmable Gate Array
Cyclic Redundancy Checking of a Field Programmable Gate Array Having an Sram Memory Architecture
Patent:
6,772,387 →
Application:
10/351,099 →
Metal-To-Metal Antifuse Employing Carbon-Containing Antifuse Material
Tileable Field-Programmable Gate Array Architecture
Tileable Field-Programmable Gate Array Architecture
Clock Tree Network in a Field Programmable Gate Array
Patent:
6,825,690 →
Application:
10/448,258 →
Synchronous First-in/First-Out Block Memory for a Field Programmable Gate Array
Patent:
6,838,902 →
Application:
10/448,259 →
Dedicated Input/Output First in/First Out Module for a Field Programmable Gate Array
Patent:
6,867,615 →
Application:
10/452,764 →
Methods of Redundancy in a Floating Trap Memory Element Based Field Programmable Gate Array
Patent:
6,970,383 →
Application:
10/459,412 →
Block Connector Splitting in Logic Block of a Field Programmable Gate Array
Patent:
6,838,903 →
Application:
10/608,454 →
Low-Capacitance Input/Output and Electrostatic Discharge Circuit for Protecting an Integrated Circuit from Electrostatic Discharge
Patent:
7,019,368 →
Application:
10/619,172 →
Flash/Dynamic Random Access Memory Field Programmable Gate Array
Antifuse Structure and a Method of Forming an Antifuse Structure
Patent:
6,841,846 →
Application:
10/625,491 →
Transistor Having Fully-Depleted Junctions to Reduce Capacitance and Increase Radiation Immunity in an Integrated Circuit
Patent:
7,119,393 →
Application:
10/629,337 →
Block Symmetrization in a Field Programmable Gate Array
Patent:
6,861,869 →
Application:
10/670,883 →
Chip Carrier Substrate with a Land Grid Array and External Bond Terminals
Patent:
6,946,726 →
Application:
10/724,530 →
Radiation Shielding Die Carrier Package
Patent:
6,853,055 →
Application:
10/724,531 →
Radiation Tolerant Sram Bit
Method and Apparatus of Memory Clearing with Monitoring Ram Memory Cells in a Field Programmable Gated Array
Patent:
6,937,063 →
Application:
10/829,596 →
Programmable System on a Chip
Programmable System on a Chip for Power-Supply Voltage and Current Monitoring and Control
Patent:
7,034,569 →
Application:
10/850,054 →
Clock Tree Network in a Field Programmable Gate Array
Patent:
7,049,846 →
Application:
10/916,926 →
Synchronous First-in/First-Out Block Memory for a Field Programmable Gate Array
Tileable Field-Programmable Gate Array Architecture
Patent:
7,015,719 →
Application:
11/056,957 →
Dedicated Input/Output First in/First Out Module for a Field Programmable Gate Array
Patent:
6,980,028 →
Application:
11/056,983 →
Switching Ratio and on-State Resistance of an Antifuse Programmed Below 5 Ma and Having a Ta or Tan Barrier Metal Layer
Patent:
7,390,726 →
Application:
11/078,952 →
Field-Programmable Gate Array Low Voltage Differential Signaling Driver Utilizing Two Complimentary Output Buffers
Amorphous Carbon Metal-to-Metal Antifuse with Adhesion Promoting Layers
Patent:
7,358,589 →
Application:
11/210,492 →
Deglitching Circuits for a Radiation-Hardened Static Random Access Memory Based Programmable Architecture
Programmable System on a Chip for Power-Supply Voltage and Current Monitoring and Control
Clock Tree Network in a Field Programmable Gate Array
Patent:
7,375,553 →
Application:
11/387,636 →
Three Input Field Programmable Gate Array Logic Circuit Configurable as a Three Input Look Up Table, a D-Latch or a D Flip-Flop
Repeatable Block Producing a Non-Uniform Routing Architecture in a Field Programmable Gate Array Having Segmented Tracks
Patent:
7,385,420 →
Application:
11/426,541 →
Deglitching Circuits for a Radiation-Hardened Static Random Access Memory Based Programmable Architecture
Patent:
7,403,411 →
Application:
11/484,243 →
Multi-Level Routing Architecture in a Field Programmable Gate Array Having Transmitters and Receivers
Patent:
7,432,733 →
Application:
11/531,375 →
Field-Programmable Gate Array Low Voltage Differential Signaling Driver Utilizing Two Complimentary Output Buffers
Patent:
7,378,867 →
Application:
11/548,199 →
Cyclic Redundancy Checking of a Field Programmable Gate Array Having an Sram Memory Architecture
Patent:
7,543,216 →
Application:
11/550,336 →
Method and Apparatus of Memory Clearing with Monitoring Ram Memory Cells in a Field Programmable Gated Array
Patent:
7,482,835 →
Application:
11/552,482 →
Tileable Field-Programmable Gate Array Architecture
Apparatus and Method of Error Detection and Correction in a Radiation-Hardened Static Random Access Memory Field-Programmable Gate Array
Flash/Dynamic Random Access Memory Field Programmable Gate Array
Radiation Tolerant Sram Bit
Dedicated Input/Output First in/First Out Module for a Field Programmable Gate Array
Patent:
7,385,419 →
Application:
11/677,432 →
Low-Capacitance Input/Output and Electrostatic Discharge Circuit for Protecting an Integrated Circuit from Electrostatic Discharge
Patent:
7,482,218 →
Application:
11/677,441 →
Synchronous First-in/First-Out Block Memory for a Field Programmable Gate Array
Block Symmetrization in a Field Programmable Gate Array
Parallel Programmable Antifuse Field Programmable Gate Array Device (Fpga) and a Method for Programming and Testing an Antifuse Fpga
Apparatus and Method for Initializing an Integrated Circuit Device and Activating a Function of the Device Once an Input Power Supply Has Reached a Threshold Voltage
Patent:
7,673,194 →
Application:
11/844,569 →
Apparatus and Method for Initializing an Integrated Circuit Device and Activating a Function of the Device Once an Input Power Supply Has Reached a Threshold Voltage
Patent:
7,426,667 →
Application:
11/844,581 →
Apparatus and Method of Error Detection and Correction in a Radiation-Hardened Static Random Access Memory Field-Programmable Gate Array
Programmable System on a Chip
Programmable System on a Chip
Radiation Tolerant Sram Bit
Three Input Field Programmable Gate Array Logic Circuit Configurable as a Three Input Look Up Table, a D-Latch or a D Flip- Flop
Clock Tree Network in a Field Programmable Gate Array
Field-Programmable Gate Array Low Voltage Differential Signaling Driver Utilizing Two Complimentary Output Buffers
Block Symmetrization in a Field Programmable Gate Array
Repeatable Block Producing a Non-Uniform Routing Architecture in a Field Programmable Gate Array Having Segmented Tracks
Deglitching Circuits for a Radiation-Hardened Static Random Access Memory Based Programmable Architecture
Apparatus for Testing a Phrase-Locked Loop in a Boundary Scan Enabled Device
Radiation Tolerant Sram Bit
Programmable System on a Chip for Power-Supply Voltage and Current Monitoring and Control
Programmable System on a Chip
Related Assignments
(25)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Apr 2, 1999
From: LIEN, JUNG-CHEUN; FENG, SHENG; SUN, CHUNG-YUAN; HUANG, EDDY CHIEH
To: PROSYS TECHNOLOGY, INC.
Reel/Frame 009911/0924 →
Assignment of Assignor's Interest
May 25, 1999
From: LIEN, JUNG-CHEUN; FENG, SHENG; SUN, CHUNG-YUAN; HUANG,EDDY CHIEH
To: PROSYS TECHNOLOGY, INC
Reel/Frame 010004/0277 →
Assignment of Assignor's Interest
Dec 14, 2000
From: MCCOLLUM, JOHN
To: ACTEL CORPORATION
Reel/Frame 011376/0803 →
Assignment of Assignor's Interest
Dec 21, 2000
From: MCCOLLUM, JOHN
To: ACTEL CORPORATION
Reel/Frame 011417/0549 →
Assignment of Assignor's Interest
Jan 26, 2001
From: WANG, DANIEL C.
To: ACTEL CORPORATION
Reel/Frame 011473/0730 →
Assignment of Assignor's Interest
Jan 23, 2002
From: EL-AYAT, KHALED A.
To: ACTEL CORPORATION
Reel/Frame 012602/0891 →
Assignment of Assignor's Interest
Mar 12, 2002
From: EL-AYAT, KHALED A.
To: ACTEL CORPORATION
Reel/Frame 012698/0764 →
Assignment of Assignor's Interest
Mar 29, 2002
From: EL-AYAT, KHALED A.
To: ACTEL CORPORATION
Reel/Frame 012760/0109 →
Assignment of Assignor's Interest
May 31, 2002
From: SUN, CHUNG; HUANG, EDDY C.
To: ACTEL CORPORATION
Reel/Frame 012939/0943 →
Assignment of Assignor's Interest
May 31, 2002
From: FENG, SHENG; LIEN, JUNG-CHEUN; HUANG, EDDY C.; SUN, CHUNG-YUAN
To: ACTEL CORPORATION
Reel/Frame 012938/0338 →
Assignment of Assignor's Interest
Jun 20, 2002
From: FENG, SHENG; LIEN, JUNG-CHEUN; HUANG, EDDY C.; SUN, CHUNG-YUAN
To: ACTEL CORPORATION
Reel/Frame 013009/0570 →
Assignment of Assignor's Interest
Jul 2, 2002
From: REYNOLDS, ALAN B.; REYNOLDS, ANDREW W.; HECHT, VOLKER
To: ACTEL CORPORATION
Reel/Frame 013053/0331 →
Assignment of Assignor's Interest
Jul 8, 2002
From: LIU, TONG; LIEN, JUNG-CHEUN; FENG, SHENG; HUANG, EDDY C.
To: ACTEL CORPORATION
Reel/Frame 013068/0402 →
Assignment of Assignor's Interest
Jul 22, 2002
From: LIEN, JUNG-CHEUN; SUN, CHUNG-YUAN; LIU, TONG; ZHANG, ZILI
To: ACTEL CORPORATION
Reel/Frame 013115/0506 →
Assignment of Assignor's Interest
Jul 30, 2002
From: WONG, WAYNE
To: ACTEL CORPORATION
Reel/Frame 013129/0676 →
Assignment of Assignor's Interest
Aug 26, 2002
From: CHAN, RICHARD
To: ACTEL CORPORATION
Reel/Frame 013224/0339 →
Assignment of Assignor's Interest
Aug 29, 2002
From: RANAWEERA, JEEWIKA; LAMBERTSON, ROY
To: ACTEL CORPORATION
Reel/Frame 013230/0856 →
Assignment of Assignor's Interest
Aug 29, 2002
From: BRYANT, IAN; SUN, CHUNG-YUAN; FENG, SHENG; LIEN, JUNG-CHEUN
To: ACTEL CORPORATION
Reel/Frame 013233/0889 →
Assignment of Assignor's Interest
Sep 16, 2002
From: WONG, WAYNE
To: ACTEL CORPORATION
Reel/Frame 013276/0743 →
Merger
Apr 8, 2005
From: PROSYS TECHNOLOGY, INC.
To: ACTEL CORPORATION
Reel/Frame 015878/0598 →
Patent Security Agreement
Feb 11, 2011
From: WHITE ELECTRONIC DESIGNS CORP.; ACTEL CORPORATION; MICROSEMI CORPORATION
To: MORGAN STANLEY & CO. INCORPORATED
Reel/Frame 025783/0613 →
Notice of Succession of Agency
Apr 9, 2015
From: ROYAL BANK OF CANADA (AS SUCCESSOR TO MORGAN STANLEY & CO. LLC)
To: BANK OF AMERICA, N.A., AS SUCCESSOR AGENT
Reel/Frame 035657/0223 →
Release of Security Interest
Jan 19, 2016
From: BANK OF AMERICA, N.A.
To: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP, A DELAWARE CORPORATION; MICROSEMI SOC CORP., A CALIFORNIA CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC., A DELAWARE CORPORATION
Reel/Frame 037558/0711 →
Patent Security Agreement
Feb 3, 2016
From: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC. (F/K/A LEGERITY, INC., ZARLINK SEMICONDUCTOR (V.N.) INC., CENTELLAX, INC., AND ZARLINK SEMICONDUCTOR (U.S.) INC.); MICROSEMI FREQUENCY AND TIME CORPORATION (F/K/A SYMMETRICON, INC.); MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037691/0697 →
Release of Security Interest
May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.), INC.; MICROSEMI FREQUENCY AND TIME CORPORATION; MICROSEMI COMMUNICATIONS, INC.
Reel/Frame 046251/0391 →