Transistor having fully-depleted junctions to reduce capacitance and increase radiation immunity in an integrated circuit
View Patent ↗A floating-gate transistor for an integrated circuit is formed on a p-type substrate. An n-type region is disposed over the p-type substrate. A p-type region is disposed over the n-type region. Spaced apart n-type source and drain regions are disposed in the p-type region forming a channel therein. A floating gate is disposed above and insulated from the channel. A control gate is disposed above and insulated from the floating gate. An isolation trench disposed in the p-type region and surrounding the source and drain regions, the isolation trench extending down into the n-type region. The substrate, the n-type region and the p-type region each biased such that the p-type region is fully depleted.
1. A transistor for an integrated circuit comprising:
a p-type substrate;
an n-type region disposed over said p-type substrate;
n-type buried layers disposed at about a boundary between said substrate and said n-type region, said buried layers doped to a higher level than said n-type region;
spaced apart p-type source and drain regions disposed in said n-type region forming a channel therein;
a control gate disposed above and insulated from said channel; and
said substrate, said n-type region and said n-type buried layers each biased such that said n-type region is fully depleted.
2. The transistor of claim 1 further including an isolation trench disposed in said n-type region and surrounding said source and drain regions, said isolation trench extending down into said substrate.
3. A floating-gate transistor for an integrated circuit comprising:
a p-type substrate;
an n-type region disposed over said p-type substrate;
n-type buried layers disposed at about a boundary between said substrate and said n-type region, said buried layers doped to a higher level than said n-type region;
spaced apart p-type source and drain regions disposed in said n-type region forming a channel therein;
a floating gate disposed above and insulated from said channel;
a control gate disposed above and insulated from said floating gate; and
said substrate, said n-type region and said n-type buried layers each biased such that said n-type region is fully depleted.
4. The floating-gate transistor of claim 3 further including an isolation trench disposed in said n-type region and surrounding said source and drain regions, said isolation trench extending down into said substrate.
5. A transistor for an integrated circuit comprising:
an n-type substrate;
a p-type region disposed over said n-type substrate;
p-type buried layers disposed at about a boundary between said substrate and said p-type region, said buried layers doped to a higher level than said p-type region;
spaced apart n-type source and drain regions disposed in said p-type region forming a channel therein;
a control gate disposed above and insulated from said channel; and
said substrate, said p-type region and said p-type buried layers each biased such that said p-type region is fully depleted.
6. The transistor of claim 5 further including an isolation trench disposed in said p-type region and surrounding said source and drain regions, said isolation trench extending down into said substrate.
7. A floating-gate transistor for an integrated circuit comprising:
an n-type substrate;
a p-type region disposed over said n-type substrate;
p-type buried layers disposed at about a boundary between said substrate and said p-type region, said buried layers doped to a higher level than said p-type region;
spaced apart n-type source and drain regions disposed in said p-type region forming a channel therein;
a floating gate disposed above and insulated from said channel;
a control gate disposed above and insulated from said floating gate; and
said substrate, said p-type region and said p-type buried layers each biased such that said p-type region is fully depleted.
8. The floating-gate transistor of claim 7 further including an isolation trench disposed in said p-type region and surrounding said source and drain regions, said isolation trench extending down into said substrate.