IP Library Granted Patent US 7,310,760
Granted Patent B1
US 7,310,760 · App. 10/318,281 · Granted Dec 18, 2007

Apparatus and method for initializing an integrated circuit device and activating a function of the device once an input power supply has reached a threshold voltage

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Quick Facts
Patent No.
US 7,310,760
App. No.
10/318,281
Granted
Dec 18, 2007
Kind
B1
Abstract

An apparatus for generating a function activation signal to activate a function in an integrated circuit device comprises a power-on circuit receiving a power input and initializing and generating a test activation signal, a test circuit receiving the test activation signal and generating a test result signal, and a threshold decision circuit receiving the test result signal and generating the function activation signal. The test circuit models a function of the integrated circuit device and generates the test result signal when the power input has reached a sufficient voltage to perform the function of the integrated circuit device. The threshold decision circuit generates the function activation signal if the test result signal indicates the power input has reached a sufficient voltage to perform the function of the integrated circuit device.

Claims (40)

1. An apparatus for generating a function activation signal to activate a function in an integrated circuit device comprising:

a power-on circuit receiving a power input and initializing and generating a test activation signal;

a test circuit receiving said test activation signal and generating a test result signal; and

a threshold decision circuit receiving said test result signal and generating the function activation signal;

wherein said test circuit models a function of the integrated circuit device and generates said test result signal when said power input has reached a sufficient voltage to perform said function of the integrated circuit device; and

wherein said threshold decision circuit generates the function activation signal if said test result signal indicates said power input has reached a sufficient voltage to perform said function of the integrated circuit device.

2. The apparatus of claim 1 , wherein said test activation signal initializes said test circuit.

3. The apparatus of claim 1 , wherein said function of the integrated circuit device is a memory clear function.

4. The apparatus of claim 1 , wherein said integrated circuit device comprises a programmable logic device.

5. The apparatus of claim 4 , wherein said programmable logic device comprises an FPGA.

6. The apparatus of claim 1 , further comprising:

an array of memory cells, wherein said test circuit comprises a memory cell.

7. The apparatus of claim 6 , wherein said test circuit is included in said array of memory cells.

8. The apparatus of claim 6 , wherein said test circuit is located outside said array of memory cells.

9. The apparatus of claim 6 , wherein said function is a memory clear function, said test circuit memory cell generates said test result signal when said power input has reached a sufficient voltage to reset said test circuit memory cell and said threshold decision circuit generates said function activation signal if said test result signal indicates said test circuit memory cell was cleared.

10. The apparatus of claim 1 , further comprising:

a signal generator circuit for generating a test-triggering signal, wherein said test activation signal initializes said test circuit and said test-triggering signal activates said test circuit to perform a test function.

11. An apparatus configured to generate a function activation signal to activate a function in an integrated circuit device comprising:

a power-on circuit configured to receive a power input and to initialize and to generate a test activation signal;

a first test circuit configured to receive said test activation signal and to generate a first test result signal;

a second test circuit configured to receive said test activation signal and to generate a second test result signal; and

a threshold decision circuit configured to receive said first test result signal and said second test result signals and to generate the function activation signal;

wherein said first test circuit and said second test circuit model functions of the integrated circuit device and generate said first test result signal and said second test result signal when said power input has reached a sufficient voltage to perform said function; and

wherein said threshold decision circuit is configured to generate the function activation signal based on said first test result signal and said second test result signal.

12. A method for generating a function activation signal to activate a function in an integrated circuit device comprising:

powering on the device;

initializing a test circuit to test a function of the device;

performing a test with said test circuit to determine whether said function of the device should be activated;

determining whether said test is successful, if not successful, repeating said test; and

activating said function of said device if said test is successful.

13. A method for generating a function activation signal to activate a function in an integrated circuit device comprising:

powering a device having the function;

sending a test activation signal to a test-triggering signal generator and a plurality of test circuits disposed in said device;

initializing said test-triggering signal generator and said plurality of test circuits;

sending said test-triggering signal to said plurality of test circuits;

performing a plurality of tests on said device with said plurality of test circuits to determine whether the function should be activated;

determining whether said tests are successful, repeating said tests if said tests are not successful;

generating test result signals if said tests are successful;

performing a logic function on at least one of said test result signals to determine whether the at least one test result signal indicates that the function can be performed; and

activating the function if said logic function indicates that the function can be performed.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.), INC.; MICROSEMI FREQUENCY AND TIME CORPORATION; MICROSEMI COMMUNICATIONS, INC.; MICROSEMI SOC CORP.; MICROSEMI CORP. - POWER PRODUCTS GROUP; MICROSEMI CORP. - RF INTEGRATED SOLUTIONS
Reel/Frame 046251/0391 →
PATENT SECURITY AGREEMENT Recorded Feb 3, 2016
From: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC. (F/K/A LEGERITY, INC., ZARLINK SEMICONDUCTOR (V.N.) INC., CENTELLAX, INC., AND ZARLINK SEMICONDUCTOR (U.S.) INC.); MICROSEMI FREQUENCY AND TIME CORPORATION (F/K/A SYMMETRICON, INC.); MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION); MICROSEMI SOC CORP. (F/K/A ACTEL CORPORATION); MICROSEMI CORP. - POWER PRODUCTS GROUP (F/K/A ADVANCED POWER TECHNOLOGY INC.); MICROSEMI CORP. - RF INTEGRATED SOLUTIONS (F/K/A AML COMMUNICATIONS, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037691/0697 →
RELEASE OF SECURITY INTEREST Recorded Jan 19, 2016
From: BANK OF AMERICA, N.A.
To: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP, A DELAWARE CORPORATION; MICROSEMI SOC CORP., A CALIFORNIA CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC., A DELAWARE CORPORATION; MICROSEMI FREQUENCY AND TIME CORPORATION, A DELAWARE CORPORATION; MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION), A DELAWARE CORPORATION; MICROSEMI CORP.-MEMORY AND STORAGE SOLUTIONS (F/K/A WHITE ELECTRONIC DESIGNS CORPORATION), AN INDIANA CORPORATION
Reel/Frame 037558/0711 →
CHANGE OF NAME Recorded Dec 28, 2015
From: ACTEL CORPORATION
To: MICROSEMI SOC CORP.
Reel/Frame 037393/0562 →
NOTICE OF SUCCESSION OF AGENCY Recorded Apr 9, 2015
From: ROYAL BANK OF CANADA (AS SUCCESSOR TO MORGAN STANLEY & CO. LLC)
To: BANK OF AMERICA, N.A., AS SUCCESSOR AGENT
Reel/Frame 035657/0223 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2011
From: WHITE ELECTRONIC DESIGNS CORP.; ACTEL CORPORATION; MICROSEMI CORPORATION
To: MORGAN STANLEY & CO. INCORPORATED
Reel/Frame 025783/0613 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2003
From: SUN, CHUNG; HUANG, EDDY; CHAN, STEPHEN
To: ACTEL CORPORATION
Reel/Frame 013802/0914 →