IP Library › Granted Patent US 6,654,283
Granted Patent Utility
US 6,654,283 · Confirmation No. 2286

FLASH MEMORY ARRAY ARCHITECTURE AND METHOD OF PROGRAMMING, ERASING AND READING THEREOF

Inventor: Sameer Haddad
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 Code Description Pages PDF
2003-07-11 IFEE Issue Fee Payment (PTO-85B) 1 View
2003-07-11 LET. Miscellaneous Incoming Letter 1 View
2002-02-26 TRNA Transmittal of New Application 3 View
2002-02-26 DRW Drawings-only black and white line drawings 6 View
2001-12-11 TRNA Transmittal of New Application 3 View
2001-12-11 SPEC Specification 9 View
2001-12-11 CLM Claims 3 View
2001-12-11 ABST Abstract 1 View
2001-12-11 DRW Drawings-only black and white line drawings 6 View
2001-12-11 OATH Oath or Declaration filed 2 View
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Quick Facts
Patent No.
US 6,654,283
App. No.
10/013,993
Filed
2001-12-11
Granted
2003-11-25
Art Unit
2818
PTA
0 days