IP Library Granted Patent US 6,895,490
Granted Patent B1
US 6,895,490 · App. 10/023,468 · Granted May 17, 2005

Method for making a write-once memory device read compatible with a write-many file system

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Quick Facts
Patent No.
US 6,895,490
App. No.
10/023,468
Granted
May 17, 2005
Kind
B1
Abstract

The preferred embodiments described herein provide a method for making a write-once memory device read compatible with a write-many file system. In one preferred embodiment, a method for re-writing to a logical address of a write-once memory device is provided. A physical-to-logical address map is built from data stored in the memory device that associates individual physical addresses with individual logical addresses. When a logical address is re-written, data associating that logical address with a new physical address is stored, and data associating that logical address with an old physical address is invalidated. When the logical address is read, the physical-to-logical address map is used to read the new physical address instead of the old physical address. Other preferred embodiments are provided, and each of the preferred embodiments described herein can be used alone or in combination with one another.

Claims (81)

1. A method for re-writing to a logical address of a write-once memory device, the method comprising:

(a) providing a write-once memory device, wherein the write-once memory device stores first data in a memory location identified by a first physical address and further stores data that associates the first physical address with a first logical address;

(b) creating a physical-to-logical address map from data stored in the write-once memory device that associates physical addresses with logical addresses; and

(c) in response to a command to write second data to the first logical address:

(c1) storing the second data in a memory location identified by a second physical address;

(c2) invalidating the data stored in the write-once memory device that associates the first physical address with the first logical address; and

(c3) storing data in the write-once memory device associating the second physical address with the first logical address.

2. The invention of claim 1 further comprising:

(d) in response to a command to read the first logical address, reading the second data in the memory location identified by the second physical address instead of the first data in the memory location identified by the first physical address.

3. The invention of claim 1 , wherein (b) and (c) are performed with a controller in the write-once memory device.

4. The invention of claim 1 , wherein (b) and (c) are performed with software in a host device coupled with the write-once memory device.

5. The invention of claim 4 , wherein the software comprises a file system.

6. The invention of claim 1 , wherein (b) and (c) are performed with hardware in a host device coupled with the write-once memory device.

7. The invention of claim 1 , wherein (b) and (c) are performed with logic circuitry within the write-once memory device.

8. The invention of claim 1 , wherein the data associating physical addresses and logical addresses is stored in redundant fields of memory locations of the write-once memory device.

9. The invention of claim 1 , wherein the data associating physical addresses and logical addresses is stored in a table in the write-once memory device.

10. The invention of claim 9 , wherein a number of entries of the table is equal to a number of logical addresses in the write-once memory device.

11. The invention of claim 1 , wherein (c2) comprises obliterating the data associating the first physical address with the first logical address.

12. The invention of claim 1 , wherein (c2) comprises storing an invalid flag for the data associating the first physical address with the first logical address.

13. The invention of claim 1 , wherein the data is invalidated in (c2) by the act of storing the data in (c3).

14. The invention of claim 1 , wherein the first data comprises a file system structure, and wherein the second data comprises an updated file system structure.

15. The invention of claim 14 , wherein the file system structure comprises a file allocation table.

16. The invention of claim 14 , wherein the file system structure comprises a root directory.

17. The invention of claim 14 , wherein the file system structure comprises a sub-directory.

18. The invention of claim 1 further comprising storing the data that associates the first physical address with a first logical address in the write-once memory device with a controller in the write-once memory device.

19. The invention of claim 1 further comprising storing the data that associates the first physical address with a first logical address in the write-once memory device with software in a host device coupled with the write-once memory device.

20. The invention of claim 19 , wherein the software comprises a file system.

21. The invention of claim 1 further comprising storing the data that associates the first physical address with a first logical address in the write-once memory device with hardware in a host device coupled with the write-once memory device.

22. The invention of claim 1 , wherein the physical-to-logical address map is created in accordance with SmartMedia™ Physical Format Specifications Version 1.30.

23. A method for storing a file system structure in a write-once memory device, the method comprising:

(a) providing a write-once memory device comprising a plurality of blocks, each block comprising a data storing area, a first redundant field, and a second redundant field; wherein a block identified by a first physical address stores a file system structure in its data storing area and a first logical address in its first redundant field;

(b) creating a physical-to-logical address map from data stored in the first and second redundant fields;

(c) from the physical-to-logical address map, determining that the first physical address is associated with the first logical address;

(d) writing an invalid flag in a second redundant field of the block identified by the first physical address;

(e) writing an updated file system structure in a data storing area of a block identified by a second physical address; and

(f) writing the first logical address in a first redundant field of the block identified by the second physical address.

24. The invention of claim 23 , wherein (b)-(f) are performed with a controller in the write-once memory device.

25. The invention of claim 23 , wherein (b)-(f) are performed with software in a host device coupled with the write-once memory device.

26. The invention of claim 25 , wherein the software comprises a file system.

27. The invention of claim 23 , wherein (b)-(f) are performed with hardware in a host device coupled with the write-once memory device.

28. The invention of claim 23 further comprising:

(g) in response to a command to read the first logical address, reading the updated file system structure in the data storing area of the block identified by the second physical address instead of the file system structure in the data storing area of the block identified by the first physical address.

29. The invention of claim 23 , wherein the file system structure comprises a file allocation table.

30. The invention of claim 23 , wherein the file system structure comprises a root directory.

31. The invention of claim 23 , wherein the file system structure comprises a sub-directory.

32. The invention of claim 23 , wherein the first redundant field comprises block address field- 1 .

33. The invention of claim 23 , wherein the first redundant field comprises block address field- 2 .

34. The invention of claim 23 , wherein the second redundant field comprises a data status flag field.

35. The invention of claim 23 , wherein the second redundant field comprises a block status flag field.

36. The invention of claim 23 , wherein the physical-to-logical address map is created in accordance with SmartMedia™ Physical Format Specifications Version 1.30.

37. A method for re-writing to a logical address of a write-once memory device, the method comprising:

(a) providing a write-once memory device, wherein the write-once memory device stores first data in a memory location identified by said logical address and further stores map data that associates a first physical address with a first logical address; and

(b) in response to a command to write second data to the first logical address:

(b1) storing the second data in a memory location identified by a second physical address; and

(b2) storing second map data in the write-once memory device associating the second physical address with the first logical address.

38. The invention of claim 37 , wherein the first physical address equals the logical address.

39. The invention of claim 37 , wherein the data that associates the first physical address with a first logical address has an initial default value which indicates first physical address equals the logical address.

40. The invention of claim 37 , wherein the map data has a one-to-one correspondence with the logical addresses of the write-once memory device.

41. The invention of claim 37 , wherein the second physical address is not equal to any valid logical address of the write-once memory device.

42. The invention of claim 37 , wherein the second map data is stored in the same location and over writes first map data.

43. The invention of claim 37 further comprising:

(c) in response to a command to read first logical address:

(c1) reading the map data associated with the logical address; and

(c2) reading the data at the indicated physical address.

44. The invention of claim 37 further comprising storing an used flag for the data associated with the logical address.

45. A method for re-writing to a logical address of a write-once memory device, the method comprising:

(a) providing a write-once memory device, wherein the write-once memory device stores first data in a memory location identified by said logical address and further stores map data that associates a first physical address with a first logical address, and further stores a used indicator flag associated with that first physical address; and

(b) in response to a command to write second data to the first logical address:

(b1) storing the second data in a memory location identified by a second physical address; and

(b2) storing second map data in the write-once memory device associating the second physical address with the first logical address.

46. The invention of claim 45 further comprising:

(b3) storing a used indicator flag associated with the second physical address.

47. The invention of claim 45 , wherein the map data associating physical addresses and logical addresses is stored in a table in the write-once memory device.

48. The invention of claim 47 , wherein a number of entries of the table is equal to a number of block logical addresses in the write-once memory device.

49. A method for re-writing to a logical address of a write-once memory device, the method comprising:

(a) providing a write-once memory device, wherein the write-once memory device stores first data in a memory location identified by said logical address and further stores map data that associates a first physical address with a first logical address; and

(b) in response to a command to write second data to the first logical address:

(b1) performing a write at the logical address;

(b2) reading the data at the logical address to confirm the write succeeded or failed;

(b3) storing the second data in a memory location identified by a second physical address only if the reading indicated a fail; and

(b4) storing second map data in the write-once memory device associating the second physical address with the first logical address only if the reading indicated a fail.

Assignments (10)
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038813/0004 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT LISTED PATENT NUMBER 8853569 TO THE CORRECT PATENT NUMBER 8883569 PREVIOUSLY RECORDED ON REEL 038300 FRAME 0665. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 25, 2016
From: SANDISK 3D LLC
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038520/0552 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2016
From: SANDISK 3D LLC.
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038300/0665 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECTIVE MERGER TO ADD PAGES TO THE MERGER DOCUMENT PREVIOUSLY RECORDED PREVIOUSLY RECORDED ON REEL 017544 FRAME 0769. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 2, 2007
From: MATRIX SEMICONDUCTOR, INC.
To: SANDISK 3D LLC
Reel/Frame 018950/0686 →
RELEASE Recorded Jan 10, 2007
From: SILICON VALLEY BANK
To: MATRIX SEMICONDUCTOR, INC.
Reel/Frame 018775/0973 →
RELEASE OF SECURITY INTEREST Recorded Jun 5, 2006
From: SILICON VALLEY BANK
To: SANDISK 3D LLC
Reel/Frame 017718/0550 →
MERGER Recorded Apr 28, 2006
From: MATRIX SEMICONDUCTOR, INC.
To: SANDISK 3D LLC
Reel/Frame 017544/0769 →
SECURITY AGREEMENT Recorded Jun 25, 2002
From: MATRIX SEMICONDUCTOR, INC.
To: SILICON VALLEY BANK
Reel/Frame 012994/0547 →
SECURITY AGREEMENT Recorded May 1, 2002
From: MATRIX SEMICONDUCTOR, INC.
To: VENTURE LENDING & LEASING III, INC., AS AGENT
Reel/Frame 012831/0698 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2002
From: MOORE, CHRISTOPHER S.; FRUIN, RICHARD MATT; LYSAGHT, COLM P.; SCHEUERLEIN, ROY E.
To: MATRIX SEMICONDUCTOR, INC.
Reel/Frame 012710/0596 →